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RE: Enable EDB7xxx interrupts



On 25-Jun-2001 Trenton D. Adams wrote:
>> -----Original Message-----
>> From: gary@chez-thomas.org [mailto:gary@chez-thomas.org] On 
>> Behalf Of Gary Thomas
>> Sent: Monday, June 25, 2001 11:28 AM
>> To: Trenton D. Adams
>> Cc: eCos discussion; eCos discussion; Lewin A.R.W. Edwards
>> Subject: RE: [ECOS] Enable EDB7xxx interrupts
>> 
>> 
>> * these enables are supposed to be set/cleared as appropriate
>>   by the hal_enable_interrupt() and hal_disable_interrupt() routines.
>>   You should not need to manipulate them directly.
>> 
>> * are you sure that you have interrupts enabled in general?  This
>>   happens [implicitly] when you start the scheduler, but not before.
> 
> I'm just made a diagnostics program that looks at the interrupt
> registers to see what happens when I insert/remove the card from the
> PCMCIA slot.  It does it forever in a thread. I enabled the EINT1
> interrupt by setting bit 5 in the INTMR1.  The interrupts work fine
> inside the CL-PS6700, and the bits in the ISR are set for that
> controller.  However, I would expect bit 5 in the INTSR1 of the EP7211
> to be set as well after that interrupt occurs.  Unless of course the HAL
> clears this for some reason.

Did you use the create_interrupt() mechanism to attach to this interrupt?
If not, the system will see it, treat it as spurious and simply clear
and ignore it.

The whole idea of having the OS handle this stuff is so that common 
mechanisms work, at least in a similar fashion, across different platforms.
Because of that, you can't really expect to just poll registers to see
what's happening.


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