This is the mail archive of the ecos-discuss@sources.redhat.com mailing list for the eCos project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]

RE: Enable EDB7xxx interrupts


> > Is EINT1 brought out anywhere on the board? Have you scoped 
> > it? I take it PCCIRRx are registers that control whether or 
> > not the pc card controller trips EINT1 on a card interrupt? 
> > For PCIOSR you indicate that you can switch interrupts 
> > between EINT1 and the fiq, have you tried setting up a 
> > handler on the fiq to see if that is catching any of your 
> > interrupts? Is EINT1 shared on that board? Is it possible 
> > that something else is holding it in limbo? From the cirrus 
> > web page, the cl-ps6700 can only be clocked at 13 or 18mHz, i 
> > take it your bus speed is adjusted appropriately? It might 
> > help if you included your definitions for PCCIRR1, PCPMR, 
> > PCSICR, PCIOSR, and a brief snippet of the output from your 
> > program. Also, out of convention, it's a bit more clear if 
> > you use the pin definitions in hal_edb7xxx.h, such as 
> > SYSCON2_PCMCIA1 instead of 0x020.
> > 
> > In general your interrupt usage looks ok, i would be more 
> > suspicious about the setup of the controller or the hardware 
> > than eCos interrupt management.
> 
> Thanks for the reply
> 
> PCCIRR = PC Card Interrupt Reserved Register
> 	These need to be set to all 1s in order for interrupts to be
> enabled.
> PCIOSR = PC Card Interrupt Output Select
> 	This register selects which interrupts are output to what line.
> Eg EINT1

Can you switch the line on these so they output to a different interrupt
line and listen on that line?

> PCICR = PC Card Interrupt Clear Register

So presumably flipping a bit high in the interrupt clear register clears
a pc card interrupt.

> I've got eCos set to 18Mhz on top of doing it manually in my 
> code.  The
> line with SYSCON3 does this.  But, as I said, eCos is set for 18Mhz
> anyhow.

Ahh i see now.
 
> I'm pretty sure EINT1 is not shared.  If it is, it's eCos sharing it,
> and I don't know if it is or not.

By shared i mean does the board have EINT1 wired to two physical
interfaces, but i'm guessing cirrus probably didn't do that.
 
I dont have a 7211 laying around atm, but if the interrupt lead off it
is exposed i would scope that to make sure it's actually generating an
interrupt.

-Dan


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]