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CL-PS6700 Timing Register


I've been attempting to set the first two timing registers of the
CL-PS6700 so that I have a 300 ns cycle time.  However, I don't know if
it's actually being set correctly.  Would someone mind taking a look at
the CL-PS6700 Preliminary Data Book for me and see if I'm doing it
right?

The data book is located at
http://www.cirrus.com/pubs/ps6700-1.pdf?DocumentID=516


Anyhow, I set the first timing register to 0x1f97.  The 1F is the
default, but I ORed on 0x97.  My CPU is running at 18.432Mhz which is
approximately a 55ns cycle time.

Trenton D. Adams
Embedded Developer
Windows Developer
Extreme Engineering Ltd.
Calgary Alberta.




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