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Re: EDB7XXX BOOTSELX pin values
- TO: "Trenton D. Adams" <tadams at extremeeng dot com>
- Subject: Re: [ECOS] EDB7XXX BOOTSELX pin values
- From: "Stefano Costa" <stefano dot costa at bluewind dot it>
- Date: Thu, 2 Aug 2001 09:21:51 +0100
- CC: ecos-discuss at sources dot redhat dot com
- Organization: Bluewind
- Reply-to: stefano dot costa at bluewind dot it
On 1 Aug 2001, at 16:42, Trenton D. Adams wrote:
> Anyone out there know how the BOOTSEL[0] AND BOOTSEL[1] pins have to
> be set for different memory configurations?
>
> In particular, we need 256Kbit x 32.
>
According to EP7209DS.PDF (DS453PP2 from Cirrus Logic) at
page 30, the possible configurations for CS0 on a EP7209 should
be:
PE[1]/BS[1] PE[0]/BS[0] nCS0
0 0 32bit
0 1 8bit
1 0 16bit
1 1 unused
This applies to the CPU, the real mem mode supported by the
board depends on the hardware of course.
bye- Stefano
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