This is the mail archive of the
ecos-discuss@sources.redhat.com
mailing list for the eCos project.
Re: ROM startup problem
- To: Shaojie Wu <swu at zmicro dot com>
- Subject: Re: [ECOS] ROM startup problem
- From: Jonathan Larmour <jlarmour at redhat dot com>
- Date: Thu, 04 Oct 2001 21:54:01 +0100
- Cc: ecos-discuss at sources dot redhat dot com
- Organization: Red Hat UK Ltd.
- References: <IFECJOABAFEMLNLJBHLOKECPCAAA.swu@zmicro.com>
Shaojie Wu wrote:
>
> Hi,
>
> I built the EB40 library (linker scripts) for ROM bootstrap , but when
> I try to download the executable file into EB40 by using GDB, jeeni and
> JTAG interface, I always fet the following errors:
>
> JEENI (ADP, ARM7TDI, RST) Rev 2.2
> Rebuilt on Jan 12 2001 at 14:22:34
> SN=0106J64 ENET=00:80:CF:00:0F:53
> Serial Rate: 38400
> Connected to ARM RDI target
> Loading section .rom_vectos, size 0x40 lma 0x1010000
> Loading section .text, size 0x65f0 lma 0x1010040
> Loading section .rodata, size 0x208 lma 0x1016630
> Loading section .data, size 0x910 lma 0x1016838
> Start Address 0x1010040 , load size 29000
> transfer rate: 21090 bits/sec, 491 bytes/write.
> RDI-execute: SWI trapped
>
> Program received sgnal SIGTRAP, Trace/breakpoint trap.
> 0x101004c in reset_vector ( )
>
> How can I solve this problem? Any reply will be highly appreciated.
I don't know exactly what's required, but if it's the SWI at the end of
reset_vector that causes the switch to supervisor mode (check the
disassmebly and compare with vectors.S to check) then the SWI is
legitimate, so you should be looking at someway to convince the Jeeni not
to trap when it sees that SWI.
Jifl
--
Red Hat, Rustat House, Clifton Road, Cambridge, UK. Tel: +44 (1223) 271062
Maybe this world is another planet's Hell -Aldous Huxley || Opinions==mine