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Re: Question about HAL_IO_BARRIER() macro?
- From: Andrew Lunn <andrew dot lunn at ascom dot ch>
- To: Qiang Huang <jameshq at liverpool dot ac dot uk>
- Cc: eCos Disuss <ecos-discuss at sources dot redhat dot com>
- Date: Fri, 20 Sep 2002 15:44:24 +0200
- Subject: Re: [ECOS] Question about HAL_IO_BARRIER() macro?
- References: <JLEEKKOKIIGFPMMBJKJJIEBCCAAA.jameshq@liv.ac.uk>
hal_io.h says:
//-----------------------------------------------------------------------------
// Enforce in-order IO for all HAL reads/writes using this macro.
#define HAL_IO_BARRIER() \
asm volatile ( "" : : : "memory" )
Basically, the compiler can rearrange the order insturctions are
executed in if it makes the code more optimal. This can have bad
effects on IO code which requires that actions happen in order. This
macro tells the compiler it must finish all actions before this
barrier point before doing any actions that follow that point.
Andrew
On Fri, Sep 20, 2002 at 02:30:16PM +0100, Qiang Huang wrote:
> Hi all:
> Does anyone know what is
>
> #define HAL_IO_BARRIER() asm volatile ( "" : : : "memory" )
>
> used for (Is this necessary?)?
>
> When accessing the register value as following:
>
> #define HAL_READ_UINT8( _register_, _value_ ) \
> CYG_MACRO_START \
> ((_value_) = *((volatile CYG_BYTE *)(_register_))); \
> HAL_IO_BARRIER (); \
> CYG_MACRO_END
>
> how does HAL_IO_BARRIER() works here?
>
> BTW what's the "memory" in HAL_IO_BARRIER stands for?
>
> Thanks a lot.
>
>
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