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Re: ARM's Exception vector location
- From: Grant Edwards <grante at visi dot com>
- To: AL Chane <al_chane at issc dot com dot tw>
- Cc: ecos-discuss at sources dot redhat dot com
- Date: Tue, 19 Nov 2002 06:13:40 -0600
- Subject: Re: [ECOS] ARM's Exception vector location
- References: <010401c28fb2$8593ecd0$1e0114ac@ALCHANE>
On Tue, Nov 19, 2002 at 06:00:42PM +0800, AL Chane wrote:
> ARM's "vectors.s" defines those exception vectors
> (reset, Undefined instructions, software interrupt,....IRQ, FIQ)
> from 0x00, 0x04.....0x1C. But I have an ARM board its address
> from 0x00 to 0x80000 are reserved for boot area. I wonder if I can
> relocate those exception vectors in vectors.s to other memory area?
No. Those locations are hard-wired in the silicon.
> Are ARM exception vectors relocatable?
Nope.
--
Grant Edwards
grante@visi.com
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