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Re: Platform Memory Layout


Hi Andrew,

Clipping from .ldi in my ports /include/pkgconf/:
#include <cyg/infra/cyg_type.inc>

MEMORY
{
   ram : ORIGIN = 0, LENGTH = 0x100000
   sram : ORIGIN = 0x60000000, LENGTH = 0x100000
}

SECTIONS
{
   SECTIONS_BEGIN
   SECTION_fixed_vectors (ram, 0x20, LMA_EQ_VMA)
   SECTION_rom_vectors (ram, 0x1000, LMA_EQ_VMA)
   SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA)



I converted the redboot.srec to redboot.asm using objdump, clipping from the same:


redboot.elf: file format elf32-littlearm


Disassembly of section .rom_vectors:

00001000 <__exception_handlers>:
   1000:	ea00000e 	b	1040 <_stext>
   1004:	e59ff018 	ldr	pc, [pc, #24]	; 1024 <.undefined_instruction>
   1008:	e59ff018 	ldr	pc, [pc, #24]	; 1028 <.software_interrupt>
   100c:	e59ff018 	ldr	pc, [pc, #24]	; 102c <.abort_prefetch>
   1010:	e59ff018 	ldr	pc, [pc, #24]	; 1030 <.abort_data>
   1014:	00000000 	andeq	r0, r0, r0
   1018:	e59ff018 	ldr	pc, [pc, #24]	; 1038 <.IRQ>
   101c:	e59ff018 	ldr	pc, [pc, #24]	; 103c <.FIQ>

00001020 <vectors>:
   1020:	00000040 	andeq	r0, r0, r0, asr #32

00001024 <.undefined_instruction>:
   1024:	0000133c 	andeq	r1, r0, ip, lsr r3

00001028 <.software_interrupt>:
   1028:	00001360 	andeq	r1, r0, r0, ror #6

0000102c <.abort_prefetch>:
   102c:	0000138c 	andeq	r1, r0, ip, lsl #7

00001030 <.abort_data>:
   1030:	000013a8 	andeq	r1, r0, r8, lsr #7
   1034:	00000000 	andeq	r0, r0, r0

00001038 <.IRQ>:
   1038:	000014c0 	andeq	r1, r0, r0, asr #9

0000103c <.FIQ>:
   103c:	00001488 	andeq	r1, r0, r8, lsl #9
Disassembly of section .text:

00001040 <reset_vector>:
   1040:	e59f0668 	ldr	r0, [pc, #1640]	; 16b0 <_eCos_id+0x14>


The ARM exception vectors are placed from 0x1000. why? And the fixed_vectors are placed at 0x1020 instead on 0x20. Please point me where I went wrong.


FYI: I have only modified the .ldi accounding to my port. The .mlt & .h in the same folder /include/pkgconf are left untouched from the reference port. will this cause problems?

Thanks,
-Mike.

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