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porting eECOS 860 board
- From: "Scott Agnew" <sagnew at innocor dot com>
- To: <ecos-discuss at sources dot redhat dot com>
- Cc: "Balendran Balasubramaniam" <bala at innocor dot com>
- Date: Sun, 15 Jun 2003 14:49:35 -0400
- Subject: [ECOS] porting eECOS 860 board
Hi all,
I have a few questions regarding the port to ecos. I have attached below
my memory layout files as well
as the hal_aux.h file. We are trying to build and load redboot. (Software
based of ecos2.0b1)
My first question is regarding the hal_aux file. Do we need to define MCP
registers and
control/status for these regions? If so, what should they be. Does it
matter if caching is not enabled?
My second question is related to downloading and executing the code. I
download the elf using a BDM and sourcegate tool into RAM.
This may be a basic question but which location in RAM do I start execution
from?
Thanks in advance for your help.
adious
scott
// eCos memory layout - Thu May 30 10:27:39 2002
// This is a generated file - do not edit
#include <cyg/infra/cyg_type.inc>
MEMORY
{
ram : ORIGIN = 0xf8000000, LENGTH = 0x08000000
}
SECTIONS
{
SECTIONS_BEGIN
CYG_LABEL_DEFN(__reserved_vectors) = 0x00000000;
. = CYG_LABEL_DEFN(__reserved_vectors) + 0x3000;
CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x10);
. = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200;
CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x10);
. = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100;
CYG_LABEL_DEFN(__reserved_for_rom) = ALIGN (0x10);
. = CYG_LABEL_DEFN(__reserved_for_rom) + 0x3cd00;
// SECTION_vectors (ram, ALIGN (0x10), LMA_EQ_VMA)
SECTION_vectors (ram, 0xf8000000, LMA_EQ_VMA)
SECTION_text (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_fini (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_rodata1 (ram, ALIGN (0x8), LMA_EQ_VMA)
SECTION_rodata (ram, ALIGN (0x8), LMA_EQ_VMA)
SECTION_fixup (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA)
SECTION_data (ram, ALIGN (0x8), LMA_EQ_VMA)
SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA)
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
SECTIONS_END
}
// eCos memory layout - Thu May 30 10:21:41 2002
// This is a generated file - do not edit
#include <cyg/infra/cyg_type.inc>
MEMORY
{
ram : ORIGIN = 0xf8000000, LENGTH = 0x08000000
rom : ORIGIN = 0x00000000, LENGTH = 0x00400000
}
SECTIONS
{
SECTIONS_BEGIN
SECTION_vectors (rom, 0x00000000, LMA_EQ_VMA)
SECTION_text (rom, ALIGN (0x4), LMA_EQ_VMA)
SECTION_fini (rom, ALIGN (0x4), LMA_EQ_VMA)
SECTION_rodata1 (rom, ALIGN (0x8), LMA_EQ_VMA)
SECTION_rodata (rom, ALIGN (0x8), LMA_EQ_VMA)
SECTION_fixup (rom, ALIGN (0x4), LMA_EQ_VMA)
SECTION_gcc_except_table (rom, ALIGN (0x1), LMA_EQ_VMA)
CYG_LABEL_DEFN(__reserved_vectors) = 0x00000000;
. = CYG_LABEL_DEFN(__reserved_vectors) + 0x3000;
CYG_LABEL_DEFN(__reserved_vsr_table) = ALIGN (0x1);
. = CYG_LABEL_DEFN(__reserved_vsr_table) + 0x200;
CYG_LABEL_DEFN(__reserved_virtual_table) = ALIGN (0x1);
. = CYG_LABEL_DEFN(__reserved_virtual_table) + 0x100;
SECTION_data (ram, ALIGN (0x10), FOLLOWING
(.gcc_except_table))
SECTION_sbss (ram, ALIGN (0x4), LMA_EQ_VMA)
SECTION_bss (ram, ALIGN (0x10), LMA_EQ_VMA)
CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
SECTIONS_END
}
// The memory map is weakly defined, allowing the application to redefine
// it if necessary. The regions defined below are the minimum requirements.
CYGARC_MEMDESC_TABLE CYGBLD_ATTRIB_WEAK = {
// Mapping for the Matrix 860 development boards
CYGARC_MEMDESC_CACHE( 0x00000000, 0x00400000 ), // ROM region
CYGARC_MEMDESC_NOCACHE( 0xFF000000 , 0x00100000 ), // MCP registers
CYGARC_MEMDESC_NOCACHE( 0xFA000000, 0x00400000 ), //
Control/Status+LEDs
CYGARC_MEMDESC_CACHE( CYGMEM_REGION_ram, CYGMEM_REGION_ram_SIZE ), //
Main memory
CYGARC_MEMDESC_TABLE_END
};
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