Re: [ECOS] Restoring boot/ecos on a AEB-1 using JTAG/Wiggler?

["Eric de Jong" <list_ericdejong_10 at gmx dot net>]

>>now I manage to get pppcb_arm_rgdb trough WIGGLER JTAG cable to read and
>>write the board RAM and peripherals RAM but I still have some doubts on the
>>way to restore the board.

I used the free software from macgraigor. With it, I could not modify the 32 bit
registers in the atmel ARM processor. The software writes 4 bytes in stead of 1
longword, and this is not possible:every byte was repeated 4 times in the
register. 0x10000005 became 0x05050505 (or was it 0x10101010?).

Below is a small piece of software I used to experiment with the remap command.
Modify it to use the right memory locations. Then load it in the internal memory
and run it.
Then load and run your own software from ram. Try a simple led flashing
application without ecos first to see if it works.

Eric.

(note: you can find ebi_inc.h in the atmel AT91 library from www.atmel.com)

---------------------------
remap.S  <-- use uppercase S in your make file/command line, lowercase s means
no preprocessing in gcc

/*
 remap.S
   ---------
   Issues a remap command, then stalls

   compile with:
    arm-elf-gcc -g -nostartfiles -DAT91R40008 -Wl,-Ttext=0 remap.S
*/

       #include "ebi_inc.h"

#define EPROM_BASE      (0x01000000)
#define EPROM_SIZE      (128*1024)                /* byte */

#define ERAM_BASE0     (0x02000000)
#define ERAM_BASE      (0x02040000)
#define ERAM_SIZE      (256*1024)                /* byte */

#define EBI_CSR_0       (EPROM_BASE | EBI_DBW_8    | EBI_NWS_8 | EBI_WSE |
\
                                      EBI_PAGES_1M | EBI_TDF_3 |       \
                                      EBI_BAT_BYTE_WRITE | EBI_CSEN )

#define EBI_CSR_1       (ERAM_BASE0 | EBI_DBW_16    | EBI_NWS_8 | EBI_WSE |
\
                                      EBI_PAGES_1M | EBI_TDF_3 |       \
                                      EBI_BAT_BYTE_WRITE | EBI_CSEN )

#define EBI_CSR_2       (0x20000000)               /* unused */
#define EBI_CSR_3       (0x30000000)               /* unused */
#define EBI_CSR_4       (0x40000000)               /* unused */
#define EBI_CSR_5       (0x50000000)               /* unused */
#define EBI_CSR_6       (0x60000000)               /* unused */
#define EBI_CSR_7       (0x70000000)               /* unused */


               .text
               .code 32
               .align  0

               .global _start
_start:                                 /* The "start" label indicates the
default entry point for the gnu linker */
     /* Copy the Image of the Memory Controller */
               sub       r10, pc,#(8+.-InitTableEBI)  /* get the address of the
chip select register image */
               ldr         r12, PtInitRemap          /* get the real jump
address ( after remap ) */

     /* Copy Chip Select Register Image to Memory Controller and command remap
*/
               ldmia     r10!, {r0-r9,r11}         /* load the complete image
and the EBI base */
               stmia       r11!, {r0-r9}                 /* store the complete
image with the remap command */

     /* Jump to ROM at its new address */
               mov       pc, r12                       /* jump and break the
pipeline */
InitRemap:  b    InitRemap

PtInitRemap:   .long     (InitRemap+0x1000000)         /* address where to jump
after REMAP */

InitTableEBI:  .long       EBI_CSR_0
               .long       EBI_CSR_1
               .long       EBI_CSR_2
               .long       EBI_CSR_3
               .long       EBI_CSR_4
               .long       EBI_CSR_5
               .long       EBI_CSR_6
               .long       EBI_CSR_7
               .long       0x00000001  /* REMAP command */
               .long       0x00000006  /* 6 memory regions, standard read */
PtEBIBase:  .long   EBI_BASE    /* EBI Base Address */
-----------------------



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