Re: [ECOS] Clock/interrupt latency

[Nick Garnett <nickg at ecoscentric dot com>]

"Daniel Lidsten" <Daniel.Lidsten@combitechsystems.com> writes:

> Hi,
> 
> I have a question regarding the clock/interrupt latency (on a MPC823e).
> When i run the tm_basic test then i get a very high variation in the
> measured times as you can see below.
> 
> If i look in the realtime characterization section in the user manual
> then i find a variation of 3 to 5 times between maximun and average to
> be normal, not as much as my measure.
> 
> ---- tm_basic diag------
>     4.75    3.84  158.72    0.00            Clock/interrupt latency
>     5.32    3.84   12.16    0.00            Clock DSR latency
> ---- tm_basic ------
> 
> I tried to define diag_printf as printf and then i got the below
> measurements. How come that diag_printf has that effect on my measure?
> 
> ---- tm_basic printf ------
>    4.75    3.84    8.96    0.00            Clock/interrupt latency
>    5.20    3.52   11.84    0.00            Clock DSR latency
> ---- tm_basic ------

diag_printf() disables interrupts while it runs, so it will increase
ISR latency. However, tm_basic ought to also disable latency recording
whenever it calls diag_printf(). Maybe some unprotected calls have
snuck in somewhere.

-- 
Nick Garnett                    eCos Kernel Architect
http://www.ecoscentric.com      The eCos and RedBoot experts


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