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Altera EPXA1 Excalibur: changing the clock output of PLL1
- From: Stephan Bourduas <stephan at macs dot ece dot mcgill dot ca>
- To: ecos-discuss at sources dot redhat dot com
- Date: Mon, 21 Jun 2004 23:59:47 -0400
- Subject: [ECOS] Altera EPXA1 Excalibur: changing the clock output of PLL1
- Reply-to: stephan at macs dot ece dot mcgill dot ca
I'm trying to get dynamically reconfigure PLL1 on my EPXA1 board via the
procedure outlined in an177.pdf from the altera website. When I change the
clock output of PLL1, my serial output doesn't work anymore, but when I
change back to the default value, the serial port works propely.
I think that I somehow have to re-initialize the serial port to use the new
clock speed. Does anyone know how to do this?
Stephan
PS: below is a related email I found searching the lists:
> ecos-discuss Digest of: thread.27071
>
>
> Excalibur AHB1 clock change
> ????????27071 by: "J Jordaan" <jjordaan@sun.ac.za>
>
> From:
> "J Jordaan" <jjordaan@sun.ac.za>
>
>
> To:
> <ecos-discuss@sources.redhat.com>
>
>
> Date:
> 21/05/04 07:34 am
>
> Hi All
>
> I've been trying to change the AHB1 clock of the Altera Excalibur Epxa1
> board without any success. According to the datasheets you can change it in
> a user application by first bypassing the PLL1. You do this by setting the
> BP1 bit in the CLK_DERIVE register. I do this with the following commands :
>
>
>
> cyg_uint32 reg;
>
> HAL_READ_UINT32(EPXA1_CLK_BASE + _CLK_DERIVE, reg);
> reg |= 0x1000;
> HAL_WRITE_UINT32(EPXA1_CLK_BASE + _CLK_DERIVE, reg);
>
>
>
> The moment I do this the whole system just hangs. When a bypass the PLL2
> with the same commands, it works without a problem.
>
> Does anybody know what the problem could be or what I'm doing wrong?
>
> Thanks
> Jacques
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