This is the mail archive of the
ecos-discuss@sourceware.org
mailing list for the eCos project.
RE: Changing PLL register was: Configuration for at91sam7se-ek
- From: "Davies, Greg" <Greg dot Davies at Ultra-UEMS dot com>
- To: "Andrew Lunn" <andrew at lunn dot ch>
- Cc: "ecos discuss" <ecos-discuss at ecos dot sourceware dot org>
- Date: Tue, 17 Jun 2008 10:39:19 -0300
- Subject: RE: [ECOS] Changing PLL register was: Configuration for at91sam7se-ek
- References: <A25DBA3B0717824BAFD61F81242D5DBDCF1572@exchange.Ultra-UEMS.ca> <A25DBA3B0717824BAFD61F81242D5DBDE1A492@exchange.Ultra-UEMS.ca> <A25DBA3B0717824BAFD61F81242D5DBD01578D0B@exchange.Ultra-UEMS.ca> <A25DBA3B0717824BAFD61F81242D5DBD01578DE7@exchange.Ultra-UEMS.ca> <20080617132000.GE24909@lunn.ch>
> Andrew Lunn
> Sent: Tuesday, June 17, 2008 10:20 AM
> To: Davies, Greg
> Cc: ecos discuss
> Subject: Re: [ECOS] Changing PLL register was: Configuration
> for at91sam7se-ek
> > The cause of all of it was that there was no PLL filter.
> Im not really a HW engineer, so maybe this is a dumb question...
Neither am I, not by a long shot...
> The Atmel document doc6112.pdf, which is the reference design
> of the AT91SAM7S, where you missing the two capaciters to
> ground on either side of the crystal? Or the
> resister/capacitor network to PLLRC? I guess the second?
It is the second. The electrical guy thought we were running straight
off the crystal, and I typically stop reading when the documentation
gets into hardware stuff, and the problem fit so nicely into that
disconnect. It also didn't help that it worked really well for a while,
and then stopped after a software change.
--
Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss