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Re: STM32 interrupt definitions
- From: Nick Garnett <nickg at ecoscentric dot com>
- To: Simon Kallweit <simon dot kallweit at intefo dot ch>
- Cc: eCos Disuss <ecos-discuss at ecos dot sourceware dot org>
- Date: 24 Nov 2008 15:12:52 +0000
- Subject: Re: [ECOS] STM32 interrupt definitions
- References: <492AA4A8.8000801@intefo.ch>
Simon Kallweit <simon.kallweit@intefo.ch> writes:
> Hi
>
> Chris Holgate discovered a little inconsistency in the interrupt
> vector definitions, we have:
>
> #define CYGNUM_HAL_INTERRUPT_DMA0_CH1
> (11+CYGNUM_HAL_INTERRUPT_EXTERNAL)
> #define CYGNUM_HAL_INTERRUPT_DMA0_CH2
> (12+CYGNUM_HAL_INTERRUPT_EXTERNAL)
> ...
>
> and
>
> #define CYGNUM_HAL_INTERRUPT_DMA2_CH1
> (56+CYGNUM_HAL_INTERRUPT_EXTERNAL)
> #define CYGNUM_HAL_INTERRUPT_DMA2_CH2
> (57+CYGNUM_HAL_INTERRUPT_EXTERNAL)
> ...
>
> In the STM32 reference manual the first set is named only DMA, the
> second set DMA2, which seems inconstant too. Can we agree to call them
> DMA1/DMA2?
That seems like a sensible thing to do.
This is partly down to ST's annoying habit of numbering devices from 1
rather that 0.
I'll check in a fix for this when I apply your recent patches.
--
Nick Garnett eCos Kernel Architect
eCosCentric Limited http://www.eCosCentric.com The eCos experts
Barnwell House, Barnwell Drive, Cambridge, UK. Tel: +44 1223 245571
Registered in England and Wales: Reg No: 4422071
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