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Re: SPI support bug in STM32 port


Hi Igor,

Good find.  Obviously I'd neglected to test SPI3 due to the pinout
conflict with the debug port.  Using SPI3 relies on the user having
previously disabled the debug port in CYGHWR_HAL_STM32_AFIO_MAPR and I
was thinking it might be useful to add this information to the CDL
description for SPI3.

Do you have an FSF copyright assignment in place?  If not, I can
generate a similar patch and submit it to the patches mailing list.

Chris.


Igor B. Poretsky wrote:
> Hello!
> 
> STM32 port does not compile when SPI bus3 is enabled. Here is a simple
> patch that fixes the issue:
> 
> Index: packages/devs/spi/cortexm/stm32/current/src/spi_stm32.c
> ===================================================================
> RCS file: /cvs/ecos/ecos/packages/devs/spi/cortexm/stm32/current/src/spi_stm32.c,v
> retrieving revision 1.2
> diff -u -r1.2 spi_stm32.c
> --- packages/devs/spi/cortexm/stm32/current/src/spi_stm32.c	5 Feb 2009 10:52:49 -0000	1.2
> +++ packages/devs/spi/cortexm/stm32/current/src/spi_stm32.c	9 Feb 2009 20:29:51 -0000
> @@ -206,7 +206,7 @@
>    .spi_reg_base                     = CYGHWR_HAL_STM32_SPI3,
>    .dma_reg_base                     = CYGHWR_HAL_STM32_DMA2,
>    .dma_tx_channel                   = 2,
> -  .dma_rx_channel                   = 1
> +  .dma_rx_channel                   = 1,
>    .cs_gpio_num                      = sizeof (bus3_cs_gpio_list),
>    .cs_gpio_list                     = bus3_cs_gpio_list,
>    .spi_gpio_list                    = bus3_spi_gpio_list,
> 
> Best regards,
> Igor.
> 


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