On Mon, Oct 26, 2009 at 08:58:19PM +1100, Laurie Gellatly wrote:
Hi All, I using an ARM 7 (LPC2212) based on an eCosCentric build. It
appears that watchdog feeds are done with interrupts enabled yet the
NXP manual warns against leaving interrupts enabled during a feed
sequence (and I'm pretty sure I've seen the consequences). Firstly,
have I missed something? Are interrupts disabled and I just don't
see where when I call watchdog_reset() OR should I be adding
cyg_interrupt_disable() and cyg_interrupt_enable() calls around the
feed sequence in watchdog_lpc2xxx.cxx
Thanks ...Laurie:{)
Hello Laurie,
I found no any global interrupt disabling/enabling workaround for eCos
io/watchdog *::reset. More that the most targets as I could see have a
peace with CPU's watchdog with a single atomic write, but NXP and some
other targets claim two writes (!atomic operation): devs/watchdog/*
Well, NXP points on such a claim, for example, in this application
note
http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/an10414.pdf
and in their other data sheets. Well, may be that is rare condition:
to break two sequenced writes, but safety is safety :-) Could you
provide a patch for the issue, please`?
IMO, you would add some CDL in devs/watchdog/arm/lpc2xxx/*/*, e.g.
CYGOPT_DEVICES_WATCHDOG_ARM_LPC2XXX_RESET_SAFE to wrap that reset,
well, to add something likes the below
int old;
HAL_DISABLE_INTERRUPTS( old );
/* Feed magic values to reset the watchdog. */
/* ... */
HAL_RESTORE_INTERRUPTS( old );
But, as I could understand, you pointed on eCosCentric build.
HTH
Sergei