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Re: Kinetis TWR-K60N512-KIT questions
- From: Ilija Kocho <ilijak at siva dot com dot mk>
- To: ecos-discuss at ecos dot sourceware dot org
- Date: Fri, 06 May 2011 09:35:47 +0200
- Subject: Re: [ECOS] Kinetis TWR-K60N512-KIT questions
- References: <SNT129-W416FC5E2D4ADAAB0F94CB4ADFE0@phx.gbl> <4D41EB2B.5080504@siva.com.mk> <SNT129-W29DA08015F0442D154694DADA70@phx.gbl> <4D9F6B61.705@siva.com.mk> <SNT129-W5405CAB49945C350910B32ADA80@phx.gbl> <4DA49538.60100@siva.com.mk> <SNT129-W6240E139CA5039E8120D1BADAA0@phx.gbl> <4DA5C749.2040706@siva.com.mk> <SNT129-W4466FCCDDA8570569F344AADAD0@phx.gbl> <4DA6D20B.7080908@siva.com.mk> <SNT129-W538FACFF5D72B03C1BB623ADAD0@phx.gbl>,<BANLkTinsuCtnuw3rt0kMiSZ9FXUuT3s9pw@mail.gmail.com>,<SNT129-W112F21A043369695047CF1ADAD0@phx.gbl> <SNT122-W25E5D81DF4EA2BFB3E88EFAD9E0@phx.gbl>,<4DC03706.9040708@siva.com.mk> <SNT122-W440C1FE69094F47A0CB361AD810@phx.gbl>,<4DC1D4D0.2070205@siva.com.mk> <SNT122-w4199AA5BC8A8B742190D06AD800@phx.gbl>
On 05.05.2011 16:30, jjp jjp wrote:
> Hi,
> I test unified RAM configuration and it works for me with some modifications.
> -. Replace SRAM by RAM hal_cortexm_kinetis_twr_k60n512.cdl to disable execution of SWI in
Might help if I see your modified CDL (or diff). Have you tried with
original files?
> hal_reset_vsr (line 187). Execution of this part reset tower and flash code runs again.
Other than selecting SRAM what is your configuration? Can you send me
the .ecc ?
What gnutools are you using?
> -. Lookup /dev/ser3 and make cyg_io_write instead of printf. Code with printf reset tower and
> flash code runs again.
>
> I also try to use cortexm exception support but it fails.
> I install an exception handler with cyg_exception_set_handler for CYGNUM_HAL_VECTOR_SERVICE
> (vector 11 -> SVCall). I make a SWI call an I expect it to modify execution flow to call my exception handler.
> SWI calls hal_default_svc_vsr and R3 get a dummy value not a function address value.
I would need more information. Can you send some code snippet?
> Why software interrupt doesn't call hal_default_exception_vsr?
> Regards.
>
> ----------------------------------------
>> Date: Thu, 5 May 2011 00:36:00 +0200
>> From: ilijak@siva.com.mk
>> To: ecos-discuss@ecos.sourceware.org
>> Subject: Re: [ECOS] Kinetis TWR-K60N512-KIT questions
>>
>> On 04.05.2011 12:46, jjp jjp wrote:
>>> Hi,
>>> It works with ecos toolchain and gcc-4.6 with -mcpu=cortex-m4!
>>> Great job Ilija.
>> Thanks for good words.
>> I am testing some integer DFT code with gcc-4.6 / Cortex-M4. Shows
>> performance improvement over M3 code even for plain C code.
>>
>>> My miktake was to put optimization flag to -O0 in global flags.
>>> I will test your RAM configuration and give you feedbacks.
>> I appreciate.
>>
>> Regards
>> Ilija
>>
>>
>> --
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>
>
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