This is the mail archive of the
ecos-discuss@sourceware.org
mailing list for the eCos project.
Re: Problem setting up an ISR for a K60 PORT
Thanks for the help.
I have put working code below. I will now try to move the code to the Kinetis HAL.
Is there any GPIO/PORT API in the HAL I should be aware of?
Include file
---------------
#ifndef ALERT_H_
#define ALERT_H_
#include <cyg/kernel/kapi.h>
#include <cyg/hal/var_io_gpio.h>
#include <cyg/hal/drv_api.h>
#include <cyg/hal/var_io.h>
#define ALERT_PORT A
#define ALERT_PIN 19
#define CYGHWR_HAL_KINETIS_GPIO_PORTA_C ((cyghwr_hal_kinetis_gpio_t*)0x40049000u)
#define CYGHWR_HAL_KINETIS_GPIO_PORTB_C ((cyghwr_hal_kinetis_gpio_t*)0x4004A040u)
#define CYGHWR_HAL_KINETIS_GPIO_PORTC_C ((cyghwr_hal_kinetis_gpio_t*)0x4004B080u)
#define CYGHWR_HAL_KINETIS_GPIO_PORTD_C ((cyghwr_hal_kinetis_gpio_t*)0x4004C0C0u)
#define CYGHWR_HAL_KINETIS_GPIO_PORTE_C ((cyghwr_hal_kinetis_gpio_t*)0x4004D100u)
#define CYGHWR_HAL_KINETIS_GPIO_DDR_GET(__port) \
CYGHWR_HAL_KINETIS_GPIO(__port, pddr)
#define CYG_HAL_KINETIS_GPIO_ISFR(__port) \
*((cyg_uint32*)(((cyg_uint32)CYGHWR_HAL_KINETIS_GPIO_PORT##__port##_C) + ((cyg_uint32)0xA0)))
#define CYGHWR_HAL_KINETIS_GPIO_ISFR_CLEAR(__port, __pin) \
CYG_HAL_KINETIS_GPIO_ISFR(__port) |= BIT_(__pin)
#define CYGHWR_HAL_KINETIS_GPIO_IFSR_GET(__port) \
CYG_HAL_KINETIS_GPIO_ISFR(__port)
extern void start_alert(cyg_addrword_t data);
#endif
code file
------------
#include "alert.h"
cyg_handle_t alert_handle;
cyg_interrupt alert_interrupt;
cyghwr_hal_kinetis_port_t * const Ports[] = {
CYGHWR_HAL_KINETIS_PORTA_P, CYGHWR_HAL_KINETIS_PORTB_P,
CYGHWR_HAL_KINETIS_PORTC_P, CYGHWR_HAL_KINETIS_PORTD_P,
CYGHWR_HAL_KINETIS_PORTE_P
};
cyg_uint32 alert_isr( cyg_vector_t vector,
cyg_addrword_t data
)
{
cyghwr_hal_kinetis_port_t *port_p;
cyg_uint32 *pifsr;
cyg_uint32 ifsr;
cyg_uint32 *ppcr;
cyg_uint32 pcr;
cyg_interrupt_mask(CYGNUM_HAL_INTERRUPT_PORTA);
port_p = Ports[0];
pifsr = &CYGHWR_HAL_KINETIS_GPIO_IFSR_GET(ALERT_PORT);
ifsr = CYGHWR_HAL_KINETIS_GPIO_IFSR_GET(ALERT_PORT);
ppcr = &port_p->pcr[ALERT_PIN];
pcr = port_p->pcr[ALERT_PIN];
// No HAL implementation for this
//cyg_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_PORTA);
{
// Manual implementation of cyg_interrupt_acknowledge
// Get address for PORTA
port_p->pcr[ALERT_PIN] |= BIT_(24);
CYGHWR_HAL_KINETIS_GPIO_ISFR_CLEAR(ALERT_PORT, ALERT_PIN);
}
return CYG_ISR_HANDLED | CYG_ISR_CALL_DSR;
}
void alert_dsr( cyg_vector_t vector,
cyg_ucount32 count,
cyg_addrword_t data
)
{
cyg_interrupt_unmask(CYGNUM_HAL_INTERRUPT_PORTA);
}
void pmbus_alert_callback(void)
{
}
void start_alert(cyg_addrword_t data)
{
cyghwr_hal_kinetis_port_t *port_p;
// Create an ISR/DSR for PORTA.
// Assuming the priority is what the DSR will run at.
// No data passed.
// This is normally done at setup before things run, so this code may need
// to move to cyg_user_start() or disable other interrupts while doing this.
// Priority 0xA is lower than I2C so that transactions can complete without an
// ALERTB interfering, but higher than the Real Time clock, etc.
cyg_interrupt_create(
CYGNUM_HAL_INTERRUPT_PORTA, // Vector
0xA0, // Priority
(cyg_addrword_t)0, // Data
alert_isr, // ISR
alert_dsr, // DSR
&alert_handle, // Handle
&alert_interrupt); // INTR
cyg_interrupt_attach(alert_handle);
//cyg_interrupt_configure(CYGNUM_HAL_INTERRUPT_PORTA, true, true);
{
// Manual implementation of cyg_interrupt_configure(CYGNUM_HAL_INTERRUPT_PORTA, true, true);
CYGHWR_HAL_KINETIS_GPIO_PIN_DDR_IN(ALERT_PORT, ALERT_PIN);
// Get address for PORTA
port_p = Ports[0];
// Neg Edge No Lock GPIO
port_p->pcr[ALERT_PIN] = (0xA << 16) | (0 << 15) | (0x1 << 8) | 0x00;
// Print registers for debug.
printf("PDDR 0x%x 0x%x\n", &CYGHWR_HAL_KINETIS_GPIO_DDR_GET(ALERT_PORT), CYGHWR_HAL_KINETIS_GPIO_DDR_GET(ALERT_PORT));
printf("PCR 0x%x 0x%x\n", &port_p->pcr[ALERT_PIN], port_p->pcr[ALERT_PIN]);
}
// No HAL implementation for this
//cyg_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_PORTA);
// In case the default is masked.
cyg_interrupt_unmask(CYGNUM_HAL_INTERRUPT_PORTA);
cyg_thread_suspend(cyg_thread_self());
}
On Feb 19, 2013, at 12:29 PM, Ilija Kocho <ilijak@siva.com.mk> wrote:
> Mike
>
> There isn't a general interrupt enable in Kinetis HAL. Actually there's
> no GPIO interrupt support yet.
>
> Just one note regarding interrupt priority numbering. Kinetis implements
> 4 bits, and by Cortex-M interrupt priority arbitration scheme it's 4
> most significant bits (out of 8). Therefore your interrupt priority
> should be something like 0x30. Priority 3 effectively is same as 0. For
> relevant Kinetis priority numbers look for /Interrupt Priority Scheme/
> in configtool.
>
> Ilija
>
>
> On 19.02.2013 15:51, Michael Jones wrote:
>>>>
>>> After our 'interrupt_create', we also have those calls (we use IRQ2
>>> instead of your PORTA):
>>> cyg_interrupt_attach(t_intrhandle);
>>> cyg_interrupt_configure(CYGNUM_HAL_INTERRUPT_IRQ2, TLV_FALSE, TLV_FALSE);
>>> cyg_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_IRQ2);
>>> cyg_interrupt_unmask(CYGNUM_HAL_INTERRUPT_IRQ2);
>>>
>>> Why do you call 'cyg_thread_suspend...' ? I do not see code that creates
>>> a thread. And when I create a thread, I do cyg_thread_create(...);
>>> cyg_thread_resume(..);.
>>>
>>> Why do you need a thread when your code is run by interrupts?
>>
>> Seeing your code, brought something to mind. I had assumed that the interrupt was enabled in the Kinetis HAL and all I had to do was configure the port. Perhaps that is not the case. I'll try to use your example and see what happens.
>
> Indeed, there isn't a general interrupt enable in Kinetis HAL.
>
>
>>
>> Thanks
>>
>>
>
>
> --
> Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
> and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss
>
--
Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss