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Viper - More system clock choices


Index: hal/powerpc/viper/current/ChangeLog
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/viper/current/ChangeLog,v
retrieving revision 1.11
diff -u -5 -p -r1.11 ChangeLog
--- hal/powerpc/viper/current/ChangeLog	18 Jul 2002 16:00:16 -0000	1.11
+++ hal/powerpc/viper/current/ChangeLog	22 Jul 2002 17:12:21 -0000
@@ -1,5 +1,11 @@
+2002-07-22  Gary Thomas  <gary@chez-thomas.org>
+
+	* src/viper.S: 
+	* cdl/hal_powerpc_viper.cdl: 
+	Support choices of 47.9, 51.6 MHz for the system clock.
+
 2002-07-18  Gary Thomas  <gary@chez-thomas.org>
 
 	* src/viper.S: Increase power-up delay before starting SDRAM.
 
 2002-07-11  Gary Thomas  <gary@chez-thomas.org>
Index: hal/powerpc/viper/current/cdl/hal_powerpc_viper.cdl
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/viper/current/cdl/hal_powerpc_viper.cdl,v
retrieving revision 1.5
diff -u -5 -p -r1.5 hal_powerpc_viper.cdl
--- hal/powerpc/viper/current/cdl/hal_powerpc_viper.cdl	11 Jul 2002 16:39:25 -0000	1.5
+++ hal/powerpc/viper/current/cdl/hal_powerpc_viper.cdl	21 Jul 2002 19:20:33 -0000
@@ -91,11 +91,11 @@ cdl_package CYGPKG_HAL_POWERPC_VIPER {
     }
 
     cdl_option CYGHWR_HAL_POWERPC_BOARD_SPEED {
         display          "Development board clock speed (MHz)"
         flavor           data
-        legal_values     47
+        legal_values     { 47 51 }
         default_value    47
         description      "
            VIPER Development Boards have various system clock speeds
            depending on the processor fitted.  Select the clock speed
            appropriate for your board so that the system can set the serial
Index: hal/powerpc/viper/current/src/viper.S
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/viper/current/src/viper.S,v
retrieving revision 1.5
diff -u -5 -p -r1.5 viper.S
--- hal/powerpc/viper/current/src/viper.S	18 Jul 2002 16:00:16 -0000	1.5
+++ hal/powerpc/viper/current/src/viper.S	22 Jul 2002 17:09:30 -0000
@@ -254,11 +254,21 @@ FUNC_START( hal_hardware_init )
 // 	Field GPL_A4DIS (bit 19) = 0
 // 	Field RLFA (bits 20-23) = 1
 // 	Field WLFA (bits 24-27) = 1
 // 	Field TLFA (bits 28-31) = 4
 	 */
-	lwi	r3,0x5E802114
+
+//        
+// PTX field is (System Clock in MHz * Refresh rate in us) / Prescale
+// e.g.  ((14*3.6864)*62.5)/32 => 100.8 => 101        
+//                
+#if (CYGHWR_HAL_POWERPC_BOARD_SPEED == 47)
+	lwi	r3,0x5E802114   // PTX = 94
+#endif        
+#if (CYGHWR_HAL_POWERPC_BOARD_SPEED == 51)
+	lwi	r3,0x65802114   // PTX = 101
+#endif        
         stw	r3,MAMR(r4)
         stw	r3,MBMR(r4)
 
 	/*
 	 * Base Register initialization.
@@ -354,12 +364,18 @@ FUNC_START( hal_hardware_init )
 // 	Field CSR (bit 24) = 0
 // 	Field LOLRE (bit 25) = 0
 // 	Field FIOPD (bit 26) = 0
 // 	Field Reserved (bits 27-31) = 0
 	 */
+#if (CYGHWR_HAL_POWERPC_BOARD_SPEED == 47)
 	/*  MF    (0:11)  = 0x00C = 12 = (47MHz/3.6864MHz)-1 */
 	lwi	r3,0x00C04000
+#endif        
+#if (CYGHWR_HAL_POWERPC_BOARD_SPEED == 51)
+	/*  MF    (0:11)  = 0x00D = 13 = (51.6MHz/3.6864MHz)-1 */
+	lwi	r3,0x00D04000
+#endif        
 	stw	r3,PLPRCR(r4)
 
 	LED(0xE0)
 	lwi	r3,0x40000
 	mtctr	r3




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