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PPC8xx - Better CPM/DPRAM handling
- From: Gary Thomas <gary at mlbassoc dot com>
- To: eCos patches <ecos-patches at sources dot redhat dot com>
- Date: 06 Mar 2003 19:39:13 -0700
- Subject: PPC8xx - Better CPM/DPRAM handling
Changes made yesterday could break 8xx configurations that
do not include serial drivers.
Index: hal/powerpc/mpc8xx/current/ChangeLog
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/mpc8xx/current/ChangeLog,v
retrieving revision 1.26
diff -u -5 -p -r1.26 ChangeLog
--- hal/powerpc/mpc8xx/current/ChangeLog 5 Mar 2003 17:21:27 -0000 1.26
+++ hal/powerpc/mpc8xx/current/ChangeLog 7 Mar 2003 02:33:30 -0000
@@ -1,5 +1,9 @@
+2003-03-06 Gary Thomas <gary at mlbassoc dot com>
+
+ * src/var_misc.c: Can only reset CPM if not relying on a ROM monitor.
+
2003-03-05 Gary Thomas <gary at mlbassoc dot com>
* src/var_misc.c (hal_variant_init): Reset CPM - always.
2003-03-05 Jonathan Larmour <jifl at eCosCentric dot com>
Index: hal/powerpc/mpc8xx/current/src/var_misc.c
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/mpc8xx/current/src/var_misc.c,v
retrieving revision 1.12
diff -u -5 -p -r1.12 var_misc.c
--- hal/powerpc/mpc8xx/current/src/var_misc.c 5 Mar 2003 17:21:27 -0000 1.12
+++ hal/powerpc/mpc8xx/current/src/var_misc.c 7 Mar 2003 02:27:16 -0000
@@ -71,15 +71,14 @@ hal_variant_init(void)
CYGARC_MFSPR (ICTRL, ictrl);
ictrl |= ICTRL_NOSERSHOW;
CYGARC_MTSPR (ICTRL, ictrl);
}
- // Note: it would be nice to only do this in the ROM/monitor. However,
- // "new" programs which rely on that happening would break if the monitor
- // environment does not handle this properly.
+#ifndef CYGSEM_HAL_USE_ROM_MONITOR
// Reset CPM
_mpc8xx_reset_cpm();
+#endif
}
//--------------------------------------------------------------------------
// Variant specific idle thread action.
bool
Index: hal/powerpc/quicc/current/ChangeLog
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/quicc/current/ChangeLog,v
retrieving revision 1.28
diff -u -5 -p -r1.28 ChangeLog
--- hal/powerpc/quicc/current/ChangeLog 5 Mar 2003 17:15:43 -0000 1.28
+++ hal/powerpc/quicc/current/ChangeLog 7 Mar 2003 02:34:33 -0000
@@ -1,5 +1,11 @@
+2003-03-06 Gary Thomas <gary at mlbassoc dot com>
+
+ * src/cpm.c: Handle case where DPRAM allocation is unknown.
+
+ * include/ppc8xx.h: Define limits of CPM/DPRAM space.
+
2003-03-05 Gary Thomas <gary at mlbassoc dot com>
* src/quicc_smc1.c: Need to flush data cache because the serial
driver may set use buffers in cacheable memory. Without this,
diag_printf() falls over if the serial driver is ever used.
Index: hal/powerpc/quicc/current/include/ppc8xx.h
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/quicc/current/include/ppc8xx.h,v
retrieving revision 1.12
diff -u -5 -p -r1.12 ppc8xx.h
--- hal/powerpc/quicc/current/include/ppc8xx.h 5 Mar 2003 17:15:43 -0000 1.12
+++ hal/powerpc/quicc/current/include/ppc8xx.h 7 Mar 2003 02:26:14 -0000
@@ -941,10 +941,11 @@ static inline EPPC *eppc_base(void)
// typically used for buffer descriptors, etc.
__externC void _mpc8xx_reset_cpm(void);
__externC unsigned short _mpc8xx_allocBd(int len);
#define QUICC_BD_BASE 0x2000 // Start of shared memory
+#define QUICC_BD_END 0x3000 // End of shared memory
#endif /* __ASSEMBLER__ */
/* Memory Periodic Timer Prescaler Register values */
Index: hal/powerpc/quicc/current/src/cpm.c
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/quicc/current/src/cpm.c,v
retrieving revision 1.1
diff -u -5 -p -r1.1 cpm.c
--- hal/powerpc/quicc/current/src/cpm.c 5 Mar 2003 17:15:44 -0000 1.1
+++ hal/powerpc/quicc/current/src/cpm.c 7 Mar 2003 02:27:14 -0000
@@ -94,12 +94,17 @@ _mpc8xx_reset_cpm(void)
// to a multiple of 8 bytes.
//
unsigned short
_mpc8xx_allocBd(int len)
{
- unsigned short bd = *nextBd;
+ unsigned short bd;
+ bd = *nextBd;
+ if ((bd < QUICC_BD_BASE) || (bd > QUICC_BD_END)) {
+ // Most likely not set up :-(
+ bd = *nextBd = QUICC_BD_BASE;
+ }
len = (len + 7) & ~7; // Multiple of 8 bytes
*nextBd += len;
return bd;
}
--
------------------------------------------------------------
Gary Thomas |
MLB Associates | Consulting for the
+1 (970) 229-1963 | Embedded world
http://www.mlbassoc.com/ |
email: <gary at mlbassoc dot com> |
gpg: http://www.chez-thomas.org/gary/gpg_key.asc
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