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Re: PPC40x serial_init fix
On Fri, 2005-09-02 at 17:22 +0200, Markus Schade wrote:
> On Fri, 2 Sep 2005, Gary Thomas wrote:
>
> > On Fri, 2005-09-02 at 16:34 +0200, Markus Schade wrote:
> >> serial initialization failed to set UART Divisor in DCR register
> >> when calculation baud clock.
> >> added calculation for PPC405EP
> >
> > What is this "CFG_BASE_BAUD" all about? How can you know that
> > value is correct for all platforms? The code I wrote uses the
> > actual settings in the CPU to calculate these and should work
> > for any platform. If it does not, let's fix it, but correctly.
>
> That is something I got from the linux kernel or u-boot bootloader.
> take arch/ppc/platforms/4xx/cpci405.h or any other.
>
> You just took the value from the CPU without actually setting the UART
> divisor. That means, you never really modified the divisor depending
> on CPU speed and desired baud rate, which is necessary (besides setting
> the DLM and DLL registers).
Fair enough, but we can't just have a hard-wired value for the
base calculation as this differs on how the board is strapped.
That's why my code started with reading the CPC0_CR0 setting.
n.b. for the board/CPU and baud rates I used, no adjustment
of the divisor was necessary. Feel free to add that code, but
not by including fixed constants which may or may not be correct.
--
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Gary Thomas | Consulting for the
MLB Associates | Embedded world
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