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[Bug 1001607] New: Cortex-M4F architectural Floating Point Support
- From: bugzilla-daemon at bugs dot ecos dot sourceware dot org
- To: ecos-patches at ecos dot sourceware dot org
- Date: Sun, 3 Jun 2012 13:56:39 +0100
- Subject: [Bug 1001607] New: Cortex-M4F architectural Floating Point Support
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Summary: Cortex-M4F architectural Floating Point Support
Product: eCos
Version: CVS
Platform: stm3240g_eval (ST STM3240G-EVAL board)
OS/Version: Cortex-M
Status: NEW
Severity: enhancement
Priority: low
Component: Patches and contributions
AssignedTo: unassigned@bugs.ecos.sourceware.org
ReportedBy: ilijak@siva.com.mk
CC: ecos-patches@ecos.sourceware.org
Class: Advice Request
Created an attachment (id=1784)
--> (http://bugs.ecos.sourceware.org/attachment.cgi?id=1784)
Cortex-M4F Floating Point Support 120603
Here I submit architectural floating point support for Cortex-M4F.
Floating point operation:
Three context saving schemes are available as configurable options:
LAZY: Save context only for threads that actually use FP. This scheme
provides lower delay penalty for threads that don't use FP but is more complex
than the other two as it involves Usage Fault Exception. It is suitable for
applications where few threads use FP.
ALL : Save FPU context for all threads. This is suitable for applications
where all or most threads use hardware FP. Then average context switching delay
may be lower than for LAZY. Also worst case delay is smaller than for LAZY.
NONE: Do not save FPU context. This is applicable only if maximum one thread
uses hardware FP and adds no additional delay compared to standard no FPU
operation.
The proposed code only supports FPU usage within thread context. FPU in
exceptions and interrupts is possible but then the handler must save/restore
the FP registers. Such example is the modified _default exception VSR_. This
choice is deliberate since saving FPU context during interrupts would add
considerable delay penalty (ALL) and/or complexity+penalty (LAZY).
GDB STUB: GDB STUB is extended with floating point registers d0..d15 aka
s0..s31 as per http://bugs.ecos.sourceware.org/show_bug.cgi?id=1001524 .
Testing:
Software was tested on Kinetis K70. Testing programs, provided as separate
attachments are taken from standard Kernel tests and may be included into if
desirable:
thread_switch_fpu.cxx - (context switching test stripped from tm_basic.cxx then
modified to present different context switching cases)
fptestf.c - fptest.c, only with float instead of double.
fpinttest.c - fptestf.c with added some "integer" threads.
Everybody is welcome to comment and ask.
Ilija
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