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src/sim/testsuite/sim/cris ChangeLog asm/addqp ...

CVSROOT:	/cvs/src
Module name:	src
Changes by:	vapier@sourceware.org	2012-03-21 04:50:02

Modified files:
	sim/testsuite/sim/cris: ChangeLog 
	sim/testsuite/sim/cris/asm: addqpc.ms boundmv32.ms fidxd.ms 
	                            fidxi.ms ftagd.ms ftagi.ms halt.ms 
	                            io6.ms io7.ms io8.ms io9.ms 
	                            movecpc.ms movempc.ms movepcb.ms 
	                            movepcd.ms movepcw.ms moveqpc.ms 
	                            moverbpc.ms moverdpc.ms moverpcb.ms 
	                            moverpcw.ms moverwpc.ms movppc.ms 
	                            movrss.ms movscpc.ms movsmpc.ms 
	                            movsrpc.ms movssr.ms movucpc.ms 
	                            movumpc.ms movurpc.ms msteppc1.ms 
	                            msteppc2.ms msteppc3.ms rfg.ms 
	                            sbfs.ms subqpc.ms 

Log message:
	sim: cris: update testsuite output after strsignal change

Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/ChangeLog.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/addqpc.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/boundmv32.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/fidxd.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/fidxi.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/ftagd.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/ftagi.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/halt.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/io6.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/io7.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/io8.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/io9.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/movecpc.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/movempc.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/movepcb.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/movepcd.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/movepcw.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/moveqpc.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/moverbpc.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/moverdpc.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/moverpcb.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/moverpcw.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/moverwpc.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/movppc.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/movrss.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/movscpc.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/movsmpc.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/movsrpc.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/movssr.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/movucpc.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/movumpc.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/movurpc.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/msteppc1.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/msteppc2.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/msteppc3.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/rfg.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/sbfs.ms.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/cris/asm/subqpc.ms.diff?cvsroot=src&r1=1.1&r2=1.2
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