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src/sim/testsuite/sim/bfin se_allopcodes.h Cha ...
- From: vapier at sourceware dot org
- To: gdb-cvs at sourceware dot org
- Date: Mon, 24 Jun 2013 01:44:55 +0000
- Subject: src/sim/testsuite/sim/bfin se_allopcodes.h Cha ...
CVSROOT: /cvs/src
Module name: src
Changes by: vapier@sourceware.org 2013-06-24 01:44:55
Modified files:
sim/testsuite/sim/bfin: se_allopcodes.h ChangeLog
Log message:
sim: bfin: speed up all insn testcases slightly
The main body of the "all insn" test is executed once per tested insn, and
we test millions of insns here. Any shrinkage we can do in this loop will
speed things up nicely (since it's multiplied per tested insn).
To that end, simplify the end-of-table test into one less insn, and omit
the SSYNC when we build for the sim. When we build to run on the hardware,
this insn matters, but the sim doesn't have write store buffers in the chip
that might get in the way (memory writes are atomic).
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/bfin/se_allopcodes.h.diff?cvsroot=src&r1=1.4&r2=1.5
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/testsuite/sim/bfin/ChangeLog.diff?cvsroot=src&r1=1.19&r2=1.20