This is the mail archive of the gdb-cvs@sourceware.org mailing list for the GDB project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[binutils-gdb] Fix bug with FP stur instructions.


https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=88ddd4a1ef8818984f87f574b424ccdc7db19660

commit 88ddd4a1ef8818984f87f574b424ccdc7db19660
Author: Jim Wilson <jim.wilson@linaro.org>
Date:   Thu Dec 1 09:06:07 2016 -0800

    Fix bug with FP stur instructions.
    
    sim/aarch64
    	* simulator.c (fsturs): Switch use of rn and st variables.
    	(fsturd, fsturq): Likewise

Diff:
---
 sim/aarch64/ChangeLog   |  5 +++++
 sim/aarch64/simulator.c | 12 ++++++------
 2 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/sim/aarch64/ChangeLog b/sim/aarch64/ChangeLog
index dcb4ac9..a632bb4 100644
--- a/sim/aarch64/ChangeLog
+++ b/sim/aarch64/ChangeLog
@@ -1,3 +1,8 @@
+2016-12-01  Jim Wilson  <jim.wilson@linaro.org>
+
+	* sim/aarch64/simulator.c (fsturs): Switch use of rn and st variables.
+	(fsturd, fsturq): Likewise
+
 2016-08-15  Mike Frysinger  <vapier@gentoo.org>
 
 	* interp.c: Include bfd.h.
diff --git a/sim/aarch64/simulator.c b/sim/aarch64/simulator.c
index e5ada18..4fa5dc1 100644
--- a/sim/aarch64/simulator.c
+++ b/sim/aarch64/simulator.c
@@ -7497,8 +7497,8 @@ fsturs (sim_cpu *cpu, int32_t offset)
   unsigned int st = INSTR (4, 0);
 
   TRACE_DECODE (cpu, "emulated at line %d", __LINE__);
-  aarch64_set_mem_u32 (cpu, aarch64_get_reg_u64 (cpu, st, 1) + offset,
-		       aarch64_get_vec_u32 (cpu, rn, 0));
+  aarch64_set_mem_u32 (cpu, aarch64_get_reg_u64 (cpu, rn, 1) + offset,
+		       aarch64_get_vec_u32 (cpu, st, 0));
 }
 
 /* Store 64 bit unscaled signed 9 bit.  */
@@ -7509,8 +7509,8 @@ fsturd (sim_cpu *cpu, int32_t offset)
   unsigned int st = INSTR (4, 0);
 
   TRACE_DECODE (cpu, "emulated at line %d", __LINE__);
-  aarch64_set_mem_u64 (cpu, aarch64_get_reg_u64 (cpu, st, 1) + offset,
-		       aarch64_get_vec_u64 (cpu, rn, 0));
+  aarch64_set_mem_u64 (cpu, aarch64_get_reg_u64 (cpu, rn, 1) + offset,
+		       aarch64_get_vec_u64 (cpu, st, 0));
 }
 
 /* Store 128 bit unscaled signed 9 bit.  */
@@ -7522,9 +7522,9 @@ fsturq (sim_cpu *cpu, int32_t offset)
   FRegister a;
 
   TRACE_DECODE (cpu, "emulated at line %d", __LINE__);
-  aarch64_get_FP_long_double (cpu, rn, & a);
+  aarch64_get_FP_long_double (cpu, st, & a);
   aarch64_set_mem_long_double (cpu,
-			       aarch64_get_reg_u64 (cpu, st, 1)
+			       aarch64_get_reg_u64 (cpu, rn, 1)
 			       + offset, a);
 }


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]