[binutils-gdb] [PowerPC] Document requirements for VSX feature

[Pedro Franco de Carvalho <pedromfc at sourceware dot org>]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=4b905ae1b4d5f90e5737ee01ab4b7149be8c1fe5

commit 4b905ae1b4d5f90e5737ee01ab4b7149be8c1fe5
Author: Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
Date:   Fri Nov 9 16:09:03 2018 -0200

    [PowerPC] Document requirements for VSX feature
    
    As suggested in
    https://sourceware.org/ml/gdb-patches/2018-10/msg00510.html, this
    patch changes the documentation for the VSX tdesc feature to make it
    clear that the altivec and FPU features are requirements.
    
    gdb/doc/ChangeLog:
    2018-11-09  Pedro Franco de Carvalho  <pedromfc@linux.ibm.com>
    
    	* gdb.texinfo (PowerPC Features): Document the altivec and fpu
    	requirements for the org.gnu.gdb.power.vsx feature.

Diff:
---
 gdb/doc/ChangeLog   |  5 +++++
 gdb/doc/gdb.texinfo | 12 +++++++-----
 2 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/gdb/doc/ChangeLog b/gdb/doc/ChangeLog
index 5c0c106..da732d4 100644
--- a/gdb/doc/ChangeLog
+++ b/gdb/doc/ChangeLog
@@ -1,3 +1,8 @@
+2018-11-09  Pedro Franco de Carvalho  <pedromfc@linux.ibm.com>
+
+	* gdb.texinfo (PowerPC Features): Document the altivec and fpu
+	requirements for the org.gnu.gdb.power.vsx feature.
+
 2018-11-01  Joel Brobecker  <brobecker@adacore.com>
 
 	* gdb.texinfo (Ada Tasks): Update the "info task 2" example
diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
index 9756155..944a2c4 100644
--- a/gdb/doc/gdb.texinfo
+++ b/gdb/doc/gdb.texinfo
@@ -43230,11 +43230,13 @@ contain registers @samp{vr0} through @samp{vr31}, @samp{vscr},
 and @samp{vrsave}.
 
 The @samp{org.gnu.gdb.power.vsx} feature is optional.  It should
-contain registers @samp{vs0h} through @samp{vs31h}.  @value{GDBN}
-will combine these registers with the floating point registers
-(@samp{f0} through @samp{f31}) and the altivec registers (@samp{vr0}
-through @samp{vr31}) to present the 128-bit wide registers @samp{vs0}
-through @samp{vs63}, the set of vector registers for POWER7.
+contain registers @samp{vs0h} through @samp{vs31h}.  @value{GDBN} will
+combine these registers with the floating point registers (@samp{f0}
+through @samp{f31}) and the altivec registers (@samp{vr0} through
+@samp{vr31}) to present the 128-bit wide registers @samp{vs0} through
+@samp{vs63}, the set of vector-scalar registers for POWER7.
+Therefore, this feature requires both @samp{org.gnu.gdb.power.fpu} and
+@samp{org.gnu.gdb.power.altivec}.
 
 The @samp{org.gnu.gdb.power.spe} feature is optional.  It should
 contain registers @samp{ev0h} through @samp{ev31h}, @samp{acc}, and