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[patch/mips] Sign extend all register addresses


FYI,

The attatched forces the MIPS tdep code to consistently sign extend
addresses such as the PC, SP, FP, RA, ....

	Andrew
Tue Jul 11 20:16:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>

	* mips-tdep.c (mips32_next_pc, mips16_next_pc,
 	read_next_frame_reg, mips_push_dummy_frame, mips_skip_stub,
 	mips_saved_pc_after_call): Use read_signed_register when
 	extracting register value.  Ensures all addresses are sign
 	extended.
	(mips_read_pc): New function.  Return sign extended address.
	(mips_gdbarch_init): Set gdbarch_read_pc.

Index: mips-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/mips-tdep.c,v
retrieving revision 1.26
diff -p -r1.26 mips-tdep.c
*** mips-tdep.c	2000/07/11 09:25:22	1.26
--- mips-tdep.c	2000/07/11 10:21:05
*************** pc_is_mips16 (bfd_vma memaddr)
*** 541,547 ****
--- 541,555 ----
      return 0;
  }
  
+ /* MIPS believes that the PC has a sign extended value.  Perhaphs the
+    all registers should be sign extended for simplicity? */
  
+ static CORE_ADDR
+ mips_read_pc (int pid)
+ {
+   return read_signed_register_pid (PC_REGNUM, pid);
+ }
+ 
  /* This returns the PC of the first inst after the prologue.  If we can't
     find the prologue, then return 0.  */
  
*************** mips32_next_pc (CORE_ADDR pc)
*** 737,743 ****
  	    {
  	    case 8:		/* JR */
  	    case 9:		/* JALR */
! 	      pc = read_register (rtype_rs (inst));	/* Set PC to that address */
  	      break;
  	    default:
  	      pc += 4;
--- 745,752 ----
  	    {
  	    case 8:		/* JR */
  	    case 9:		/* JALR */
! 	      /* Set PC to that address */
! 	      pc = read_signed_register (rtype_rs (inst));
  	      break;
  	    default:
  	      pc += 4;
*************** mips32_next_pc (CORE_ADDR pc)
*** 754,760 ****
  	      case 16:		/* BLTZALL */
  	      case 18:		/* BLTZALL */
  	      less_branch:
! 		if (read_register (itype_rs (inst)) < 0)
  		  pc += mips32_relative_offset (inst) + 4;
  		else
  		  pc += 8;	/* after the delay slot */
--- 763,769 ----
  	      case 16:		/* BLTZALL */
  	      case 18:		/* BLTZALL */
  	      less_branch:
! 		if (read_signed_register (itype_rs (inst)) < 0)
  		  pc += mips32_relative_offset (inst) + 4;
  		else
  		  pc += 8;	/* after the delay slot */
*************** mips32_next_pc (CORE_ADDR pc)
*** 764,770 ****
  	      case 17:		/* BGEZAL */
  	      case 19:		/* BGEZALL */
  	      greater_equal_branch:
! 		if (read_register (itype_rs (inst)) >= 0)
  		  pc += mips32_relative_offset (inst) + 4;
  		else
  		  pc += 8;	/* after the delay slot */
--- 773,779 ----
  	      case 17:		/* BGEZAL */
  	      case 19:		/* BGEZALL */
  	      greater_equal_branch:
! 		if (read_signed_register (itype_rs (inst)) >= 0)
  		  pc += mips32_relative_offset (inst) + 4;
  		else
  		  pc += 8;	/* after the delay slot */
*************** mips32_next_pc (CORE_ADDR pc)
*** 794,823 ****
  	  break;		/* The new PC will be alternate mode */
  	case 4:		/* BEQ , BEQL */
  	equal_branch:
! 	  if (read_register (itype_rs (inst)) ==
! 	      read_register (itype_rt (inst)))
  	    pc += mips32_relative_offset (inst) + 4;
  	  else
  	    pc += 8;
  	  break;
  	case 5:		/* BNE , BNEL */
  	neq_branch:
! 	  if (read_register (itype_rs (inst)) !=
! 	      read_register (itype_rs (inst)))
  	    pc += mips32_relative_offset (inst) + 4;
  	  else
  	    pc += 8;
  	  break;
  	case 6:		/* BLEZ , BLEZL */
  	less_zero_branch:
! 	  if (read_register (itype_rs (inst) <= 0))
  	    pc += mips32_relative_offset (inst) + 4;
  	  else
  	    pc += 8;
  	  break;
  	case 7:
  	greater_branch:	/* BGTZ BGTZL */
! 	  if (read_register (itype_rs (inst) > 0))
  	    pc += mips32_relative_offset (inst) + 4;
  	  else
  	    pc += 8;
--- 803,832 ----
  	  break;		/* The new PC will be alternate mode */
  	case 4:		/* BEQ , BEQL */
  	equal_branch:
! 	  if (read_signed_register (itype_rs (inst)) ==
! 	      read_signed_register (itype_rt (inst)))
  	    pc += mips32_relative_offset (inst) + 4;
  	  else
  	    pc += 8;
  	  break;
  	case 5:		/* BNE , BNEL */
  	neq_branch:
! 	  if (read_signed_register (itype_rs (inst)) !=
! 	      read_signed_register (itype_rs (inst)))
  	    pc += mips32_relative_offset (inst) + 4;
  	  else
  	    pc += 8;
  	  break;
  	case 6:		/* BLEZ , BLEZL */
  	less_zero_branch:
! 	  if (read_signed_register (itype_rs (inst) <= 0))
  	    pc += mips32_relative_offset (inst) + 4;
  	  else
  	    pc += 8;
  	  break;
  	case 7:
  	greater_branch:	/* BGTZ BGTZL */
! 	  if (read_signed_register (itype_rs (inst) > 0))
  	    pc += mips32_relative_offset (inst) + 4;
  	  else
  	    pc += 8;
*************** mips16_next_pc (CORE_ADDR pc)
*** 1066,1072 ****
  	case 4:		/* beqz */
  	  upk.fmt = ritype;
  	  unpack_mips16 (pc, &upk);
! 	  reg = read_register (upk.regx);
  	  if (reg == 0)
  	    pc += (upk.offset << 1) + 2;
  	  else
--- 1075,1081 ----
  	case 4:		/* beqz */
  	  upk.fmt = ritype;
  	  unpack_mips16 (pc, &upk);
! 	  reg = read_signed_register (upk.regx);
  	  if (reg == 0)
  	    pc += (upk.offset << 1) + 2;
  	  else
*************** mips16_next_pc (CORE_ADDR pc)
*** 1075,1081 ****
  	case 5:		/* bnez */
  	  upk.fmt = ritype;
  	  unpack_mips16 (pc, &upk);
! 	  reg = read_register (upk.regx);
  	  if (reg != 0)
  	    pc += (upk.offset << 1) + 2;
  	  else
--- 1084,1090 ----
  	case 5:		/* bnez */
  	  upk.fmt = ritype;
  	  unpack_mips16 (pc, &upk);
! 	  reg = read_signed_register (upk.regx);
  	  if (reg != 0)
  	    pc += (upk.offset << 1) + 2;
  	  else
*************** mips16_next_pc (CORE_ADDR pc)
*** 1085,1091 ****
  	  upk.fmt = i8type;
  	  unpack_mips16 (pc, &upk);
  	  /* upk.regx contains the opcode */
! 	  reg = read_register (24);	/* Test register is 24 */
  	  if (((upk.regx == 0) && (reg == 0))	/* BTEZ */
  	      || ((upk.regx == 1) && (reg != 0)))	/* BTNEZ */
  	    /* pc = add_offset_16(pc,upk.offset) ; */
--- 1094,1100 ----
  	  upk.fmt = i8type;
  	  unpack_mips16 (pc, &upk);
  	  /* upk.regx contains the opcode */
! 	  reg = read_signed_register (24);	/* Test register is 24 */
  	  if (((upk.regx == 0) && (reg == 0))	/* BTEZ */
  	      || ((upk.regx == 1) && (reg != 0)))	/* BTNEZ */
  	    /* pc = add_offset_16(pc,upk.offset) ; */
*************** mips16_next_pc (CORE_ADDR pc)
*** 1115,1121 ****
  		  reg = 31;
  		  break;	/* BOGUS Guess */
  		}
! 	      pc = read_register (reg);
  	    }
  	  else
  	    pc += 2;
--- 1124,1130 ----
  		  reg = 31;
  		  break;	/* BOGUS Guess */
  		}
! 	      pc = read_signed_register (reg);
  	    }
  	  else
  	    pc += 2;
*************** read_next_frame_reg (fi, regno)
*** 1344,1350 ****
  	    return read_memory_integer (ADDR_BITS_REMOVE (fi->saved_regs[regno]), MIPS_SAVED_REGSIZE);
  	}
      }
!   return read_register (regno);
  }
  
  /* mips_addr_bits_remove - remove useless address bits  */
--- 1353,1359 ----
  	    return read_memory_integer (ADDR_BITS_REMOVE (fi->saved_regs[regno]), MIPS_SAVED_REGSIZE);
  	}
      }
!   return read_signed_register (regno);
  }
  
  /* mips_addr_bits_remove - remove useless address bits  */
*************** mips_push_dummy_frame ()
*** 2473,2479 ****
    struct linked_proc_info *link = (struct linked_proc_info *)
    xmalloc (sizeof (struct linked_proc_info));
    mips_extra_func_info_t proc_desc = &link->info;
!   CORE_ADDR sp = ADDR_BITS_REMOVE (read_register (SP_REGNUM));
    CORE_ADDR old_sp = sp;
    link->next = linked_proc_desc_table;
    linked_proc_desc_table = link;
--- 2482,2488 ----
    struct linked_proc_info *link = (struct linked_proc_info *)
    xmalloc (sizeof (struct linked_proc_info));
    mips_extra_func_info_t proc_desc = &link->info;
!   CORE_ADDR sp = ADDR_BITS_REMOVE (read_signed_register (SP_REGNUM));
    CORE_ADDR old_sp = sp;
    link->next = linked_proc_desc_table;
    linked_proc_desc_table = link;
*************** mips_skip_stub (pc)
*** 3706,3719 ****
       target PC is in $31 ($ra).  */
    if (strcmp (name, "__mips16_ret_sf") == 0
        || strcmp (name, "__mips16_ret_df") == 0)
!     return read_register (RA_REGNUM);
  
    if (strncmp (name, "__mips16_call_stub_", 19) == 0)
      {
        /* If the PC is in __mips16_call_stub_{1..10}, this is a call stub
           and the target PC is in $2.  */
        if (name[19] >= '0' && name[19] <= '9')
! 	return read_register (2);
  
        /* If the PC at the start of __mips16_call_stub_{s,d}f_{0..10}, i.e.
           before the jal instruction, this is effectively a call stub
--- 3715,3728 ----
       target PC is in $31 ($ra).  */
    if (strcmp (name, "__mips16_ret_sf") == 0
        || strcmp (name, "__mips16_ret_df") == 0)
!     return read_signed_register (RA_REGNUM);
  
    if (strncmp (name, "__mips16_call_stub_", 19) == 0)
      {
        /* If the PC is in __mips16_call_stub_{1..10}, this is a call stub
           and the target PC is in $2.  */
        if (name[19] >= '0' && name[19] <= '9')
! 	return read_signed_register (2);
  
        /* If the PC at the start of __mips16_call_stub_{s,d}f_{0..10}, i.e.
           before the jal instruction, this is effectively a call stub
*************** mips_skip_stub (pc)
*** 3735,3741 ****
  	         So scan down to the lui/addi and extract the target
  	         address from those two instructions.  */
  
! 	      CORE_ADDR target_pc = read_register (2);
  	      t_inst inst;
  	      int i;
  
--- 3744,3750 ----
  	         So scan down to the lui/addi and extract the target
  	         address from those two instructions.  */
  
! 	      CORE_ADDR target_pc = read_signed_register (2);
  	      t_inst inst;
  	      int i;
  
*************** mips_skip_stub (pc)
*** 3765,3771 ****
  	  else
  	    /* This is the 'return' part of a call stub.  The return
  	       address is in $r18.  */
! 	    return read_register (18);
  	}
      }
    return 0;			/* not a stub */
--- 3774,3780 ----
  	  else
  	    /* This is the 'return' part of a call stub.  The return
  	       address is in $r18.  */
! 	    return read_signed_register (18);
  	}
      }
    return 0;			/* not a stub */
*************** mips_get_saved_register (raw_buffer, opt
*** 3964,3971 ****
  static CORE_ADDR
  mips_saved_pc_after_call (struct frame_info *frame)
  {
! 
!   return read_register (RA_REGNUM);
  }
  
  
--- 3973,3979 ----
  static CORE_ADDR
  mips_saved_pc_after_call (struct frame_info *frame)
  {
!   return read_signed_register (RA_REGNUM);
  }
  
  
*************** mips_gdbarch_init (info, arches)
*** 4248,4254 ****
       #undef/#define REGISTER_NAMES and the new REGISTER_NAME(nr).
       Further work on it is required. */
    set_gdbarch_register_name (gdbarch, mips_register_name);
!   set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
    set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
    set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
    set_gdbarch_write_fp (gdbarch, generic_target_write_fp);
--- 4256,4262 ----
       #undef/#define REGISTER_NAMES and the new REGISTER_NAME(nr).
       Further work on it is required. */
    set_gdbarch_register_name (gdbarch, mips_register_name);
!   set_gdbarch_read_pc (gdbarch, mips_read_pc);
    set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
    set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
    set_gdbarch_write_fp (gdbarch, generic_target_write_fp);

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