[PATCH/RFA] h8300 Multiple changes to gdb/sim

[Andrew Volkov <Andrew dot Volkov at transas dot com>]

Hi,

Attached is a patches to fix bugs/inconsistences in 
h8300 part of gdb/sim. All patches must applied one after another. Committed
as obvious.

Andrey Volkov

stage1-regnames.diff
2002-05-15  Andrey Volkov  <avolkov@sources.redhat.com>
	* gdb/h8300-tdep.c: Fix literal regnumbers to REGNUMS.
	* sim/h8300/compile.c: Ditto.
	* sim/h8300/compile.c: Fix instruction and cycles counting

stage2-ccr-flags.diff
2002-05-15  Andrey Volkov  <avolkov@sources.redhat.com>
	* gdb/h8300-tdep.c: Add additional CCR flags (I,UI,H,U) 
	* sim/h8300/compile.c: Ditto.

stage3-ccr-opcodes.diff
2002-05-15  Andrey Volkov  <avolkov@sources.redhat.com>
	* include/opcode/h8300.h: Corrected defs of all 
				  	  control regs and eepmov instr.

stage4-h8s-target.diff
2002-05-15  Andrey Volkov  <avolkov@sources.redhat.com>
	* sim/run: Made h8300s as new target, not h8300h alias.
		     Added new option -S (h8300s target)	
	* sim/h8300/compile.c: Ditto.
	* sim/h8300/inst.h: Ditto.

stage5-exr-reg.diff
2002-05-15  Andrey Volkov  <avolkov@sources.redhat.com>
	* gdb/config/h8300/tm-h8300.h: Add support of EXR register
	* gdb/h8300-tdep.c: Ditto.
	* sim/h8300/compile.c: Ditto.
	* sim/h8300/inst.h: Ditto.

stage6-fix-opcodes.diff
2002-05-15  Andrey Volkov  <avolkov@sources.redhat.com>
	* sim/h8300/compile.c: Add absented opcodes: 
				     LDC, STC, EEPMOV, TAS.

Attachment: stage1-regnames.diff
Description: Binary data

Attachment: stage2-ccr-flags.diff
Description: Binary data

Attachment: stage3-ccr-opcodes.diff
Description: Binary data

Attachment: stage4-h8s-target.diff
Description: Binary data

Attachment: stage5-exr-reg.diff
Description: Binary data

Attachment: stage6-fix-absend-oc.diff
Description: Binary data