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[commit/sim] Fix v850 build; Was: [commit] Fix boolean fallout; Was:bye-bye boolean
- From: Andrew Cagney <ac131313 at redhat dot com>
- To: gdb-patches at sources dot redhat dot com
- Cc: Alan Modra <amodra at bigpond dot net dot au>
- Date: Sat, 30 Nov 2002 13:04:10 -0500
- Subject: [commit/sim] Fix v850 build; Was: [commit] Fix boolean fallout; Was:bye-bye boolean
- References: <20021130083313.GO949@bubble.sa.bigpond.net.au> <3DE8E8D7.9060302@redhat.com>
FYI,
More fallout. The cross targets should now all build.
committed,
Andrew
2002-11-30 Andrew Cagney <cagney@redhat.com>
* simops.c: Use int, 1, 0 instead of boolean, true and false.
* sim-main.h: Ditto.
Index: sim-main.h
===================================================================
RCS file: /cvs/src/src/sim/v850/sim-main.h,v
retrieving revision 1.2
diff -u -r1.2 sim-main.h
--- sim-main.h 29 Aug 2002 16:59:20 -0000 1.2
+++ sim-main.h 30 Nov 2002 18:00:42 -0000
@@ -374,14 +374,14 @@
unsigned long int sfi,
unsigned32 /*unsigned long int*/ * quotient_ptr,
unsigned32 /*unsigned long int*/ * remainder_ptr,
- boolean * overflow_ptr
+ int *overflow_ptr
);
extern void divn ( unsigned int N,
unsigned long int als,
unsigned long int sfi,
signed32 /*signed long int*/ * quotient_ptr,
signed32 /*signed long int*/ * remainder_ptr,
- boolean * overflow_ptr
+ int *overflow_ptr
);
extern int type1_regs[];
extern int type2_regs[];
Index: simops.c
===================================================================
RCS file: /cvs/src/src/sim/v850/simops.c,v
retrieving revision 1.5
diff -u -r1.5 simops.c
--- simops.c 30 Sep 2002 20:11:08 -0000 1.5
+++ simops.c 30 Nov 2002 18:00:42 -0000
@@ -329,7 +329,7 @@
}
static void
-Multiply64 (boolean sign, unsigned long op0)
+Multiply64 (int sign, unsigned long op0)
{
unsigned long op1;
unsigned long lo;
@@ -1911,7 +1911,7 @@
{
trace_input ("mulu", OP_REG_REG_REG, 0);
- Multiply64 (false, State.regs[ OP[0] ]);
+ Multiply64 (0, State.regs[ OP[0] ]);
trace_output (OP_REG_REG_REG);
@@ -1982,7 +1982,7 @@
unsigned long int sfi,
unsigned32 /*unsigned long int*/ * quotient_ptr,
unsigned32 /*unsigned long int*/ * remainder_ptr,
- boolean * overflow_ptr
+ int * overflow_ptr
)
{
unsigned long ald = sfi >> (N - 1);
@@ -2056,7 +2056,7 @@
unsigned long int sfi,
signed32 /*signed long int*/ * quotient_ptr,
signed32 /*signed long int*/ * remainder_ptr,
- boolean * overflow_ptr
+ int * overflow_ptr
)
{
unsigned long ald = (signed long) sfi >> (N - 1);
@@ -2155,7 +2155,7 @@
unsigned32 /*unsigned long int*/ remainder;
unsigned long int divide_by;
unsigned long int divide_this;
- boolean overflow = false;
+ int overflow = 0;
unsigned int imm5;
trace_input ("sdivun", OP_IMM_REG_REG_REG, 0);
@@ -2190,7 +2190,7 @@
signed32 /*signed long int*/ remainder;
signed long int divide_by;
signed long int divide_this;
- boolean overflow = false;
+ int overflow = 0;
unsigned int imm5;
trace_input ("sdivn", OP_IMM_REG_REG_REG, 0);
@@ -2225,7 +2225,7 @@
unsigned32 /*unsigned long int*/ remainder;
unsigned long int divide_by;
unsigned long int divide_this;
- boolean overflow = false;
+ int overflow = 0;
unsigned int imm5;
trace_input ("sdivhun", OP_IMM_REG_REG_REG, 0);
@@ -2260,7 +2260,7 @@
signed32 /*signed long int*/ remainder;
signed long int divide_by;
signed long int divide_this;
- boolean overflow = false;
+ int overflow = 0;
unsigned int imm5;
trace_input ("sdivhn", OP_IMM_REG_REG_REG, 0);
@@ -2295,7 +2295,7 @@
unsigned long int remainder;
unsigned long int divide_by;
unsigned long int divide_this;
- boolean overflow = false;
+ int overflow = 0;
trace_input ("divu", OP_REG_REG_REG, 0);
@@ -2306,7 +2306,7 @@
if (divide_by == 0)
{
- overflow = true;
+ overflow = 1;
divide_by = 1;
}
@@ -2333,7 +2333,7 @@
signed long int remainder;
signed long int divide_by;
signed long int divide_this;
- boolean overflow = false;
+ int overflow = 0;
trace_input ("div", OP_REG_REG_REG, 0);
@@ -2344,7 +2344,7 @@
if (divide_by == 0 || (divide_by == -1 && divide_this == (1 << 31)))
{
- overflow = true;
+ overflow = 1;
divide_by = 1;
}
@@ -2371,7 +2371,7 @@
unsigned long int remainder;
unsigned long int divide_by;
unsigned long int divide_this;
- boolean overflow = false;
+ int overflow = 0;
trace_input ("divhu", OP_REG_REG_REG, 0);
@@ -2382,7 +2382,7 @@
if (divide_by == 0)
{
- overflow = true;
+ overflow = 1;
divide_by = 1;
}
@@ -2409,7 +2409,7 @@
signed long int remainder;
signed long int divide_by;
signed long int divide_this;
- boolean overflow = false;
+ int overflow = 0;
trace_input ("divh", OP_REG_REG_REG, 0);
@@ -2420,7 +2420,7 @@
if (divide_by == 0 || (divide_by == -1 && divide_this == (1 << 31)))
{
- overflow = true;
+ overflow = 1;
divide_by = 1;
}
@@ -2445,7 +2445,7 @@
{
trace_input ("mulu", OP_IMM_REG_REG, 0);
- Multiply64 (false, (OP[3] & 0x1f) | ((OP[3] >> 13) & 0x1e0));
+ Multiply64 (0, (OP[3] & 0x1f) | ((OP[3] >> 13) & 0x1e0));
trace_output (OP_IMM_REG_REG);
@@ -2458,7 +2458,7 @@
{
trace_input ("mul", OP_IMM_REG_REG, 0);
- Multiply64 (true, SEXT9 ((OP[3] & 0x1f) | ((OP[3] >> 13) & 0x1e0)));
+ Multiply64 (1, SEXT9 ((OP[3] & 0x1f) | ((OP[3] >> 13) & 0x1e0)));
trace_output (OP_IMM_REG_REG);
@@ -2608,7 +2608,7 @@
{
trace_input ("mul", OP_REG_REG_REG, 0);
- Multiply64 (true, State.regs[ OP[0] ]);
+ Multiply64 (1, State.regs[ OP[0] ]);
trace_output (OP_REG_REG_REG);