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Re: [patch] m32r-stub.c


Doug, 
Did we ever resolve whether you have a copyright assignment on file?
Cheers,
Michael

Doug Evans wrote:
> 
> ok to check in?
> 
> 2002-12-19  Doug Evans  <dje@sebabeach.org>
> 
>         * m32r-stub.c (all asms): Remove multi-line strings.
> 
> Index: m32r-stub.c
> ===================================================================
> RCS file: /cvs/src/src/gdb/m32r-stub.c,v
> retrieving revision 1.5
> diff -c -p -r1.5 m32r-stub.c
> *** m32r-stub.c 4 Oct 2002 22:17:36 -0000       1.5
> --- m32r-stub.c 19 Dec 2002 17:04:36 -0000
> *************** struct PSWreg {         /* separate out the bit
> *** 1204,1250 ****
>      Upon entry, all other registers are assumed to have not been modified
>      since the interrupt/trap occured.  */
> 
> ! asm ("
> ! stash_registers:
> !       push r0
> !       push r1
> !       seth r1, #shigh(registers)
> !       add3 r1, r1, #low(registers)
> !       pop r0          ; r1
> !       st r0, @(4,r1)
> !       pop r0          ; r0
> !       st r0, @r1
> !       addi r1, #4     ; only add 4 as subsequent saves are `pre inc'
> !       st r2, @+r1
> !       st r3, @+r1
> !       st r4, @+r1
> !       st r5, @+r1
> !       st r6, @+r1
> !       st r7, @+r1
> !       st r8, @+r1
> !       st r9, @+r1
> !       st r10, @+r1
> !       st r11, @+r1
> !       st r12, @+r1
> !       st r13, @+r1    ; fp
> !       pop r0          ; lr (r14)
> !       st r0, @+r1
> !       st sp, @+r1     ; sp contains right value at this point
> !       mvfc r0, cr0
> !       st r0, @+r1     ; cr0 == PSW
> !       mvfc r0, cr1
> !       st r0, @+r1     ; cr1 == CBR
> !       mvfc r0, cr2
> !       st r0, @+r1     ; cr2 == SPI
> !       mvfc r0, cr3
> !       st r0, @+r1     ; cr3 == SPU
> !       mvfc r0, cr6
> !       st r0, @+r1     ; cr6 == BPC
> !       st r0, @+r1     ; PC  == BPC
> !       mvfaclo r0
> !       st r0, @+r1     ; ACCL
> !       mvfachi r0
> !       st r0, @+r1     ; ACCH
>         jmp lr");
> 
>   /* C routine to clean up what stash_registers did.
> --- 1204,1250 ----
>      Upon entry, all other registers are assumed to have not been modified
>      since the interrupt/trap occured.  */
> 
> ! asm ("\n\
> ! stash_registers:\n\
> !       push r0\n\
> !       push r1\n\
> !       seth r1, #shigh(registers)\n\
> !       add3 r1, r1, #low(registers)\n\
> !       pop r0          ; r1\n\
> !       st r0, @(4,r1)\n\
> !       pop r0          ; r0\n\
> !       st r0, @r1\n\
> !       addi r1, #4     ; only add 4 as subsequent saves are `pre inc'\n\
> !       st r2, @+r1\n\
> !       st r3, @+r1\n\
> !       st r4, @+r1\n\
> !       st r5, @+r1\n\
> !       st r6, @+r1\n\
> !       st r7, @+r1\n\
> !       st r8, @+r1\n\
> !       st r9, @+r1\n\
> !       st r10, @+r1\n\
> !       st r11, @+r1\n\
> !       st r12, @+r1\n\
> !       st r13, @+r1    ; fp\n\
> !       pop r0          ; lr (r14)\n\
> !       st r0, @+r1\n\
> !       st sp, @+r1     ; sp contains right value at this point\n\
> !       mvfc r0, cr0\n\
> !       st r0, @+r1     ; cr0 == PSW\n\
> !       mvfc r0, cr1\n\
> !       st r0, @+r1     ; cr1 == CBR\n\
> !       mvfc r0, cr2\n\
> !       st r0, @+r1     ; cr2 == SPI\n\
> !       mvfc r0, cr3\n\
> !       st r0, @+r1     ; cr3 == SPU\n\
> !       mvfc r0, cr6\n\
> !       st r0, @+r1     ; cr6 == BPC\n\
> !       st r0, @+r1     ; PC  == BPC\n\
> !       mvfaclo r0\n\
> !       st r0, @+r1     ; ACCL\n\
> !       mvfachi r0\n\
> !       st r0, @+r1     ; ACCH\n\
>         jmp lr");
> 
>   /* C routine to clean up what stash_registers did.
> *************** cleanup_stash (void)
> *** 1278,1319 ****
>       registers[SPI] = registers[R15];
>   }
> 
> ! asm ("
> ! restore_and_return:
> !       seth r0, #shigh(registers+8)
> !       add3 r0, r0, #low(registers+8)
> !       ld r2, @r0+     ; restore r2
> !       ld r3, @r0+     ; restore r3
> !       ld r4, @r0+     ; restore r4
> !       ld r5, @r0+     ; restore r5
> !       ld r6, @r0+     ; restore r6
> !       ld r7, @r0+     ; restore r7
> !       ld r8, @r0+     ; restore r8
> !       ld r9, @r0+     ; restore r9
> !       ld r10, @r0+    ; restore r10
> !       ld r11, @r0+    ; restore r11
> !       ld r12, @r0+    ; restore r12
> !       ld r13, @r0+    ; restore r13
> !       ld r14, @r0+    ; restore r14
> !       ld r15, @r0+    ; restore r15
> !       addi r0, #4     ; don't restore PSW (rte will do it)
> !       ld r1, @r0+     ; restore cr1 == CBR (no-op, because it's read only)
> !       mvtc r1, cr1
> !       ld r1, @r0+     ; restore cr2 == SPI
> !       mvtc r1, cr2
> !       ld r1, @r0+     ; restore cr3 == SPU
> !       mvtc r1, cr3
> !       addi r0, #4     ; skip BPC
> !       ld r1, @r0+     ; restore cr6 (BPC) == PC
> !       mvtc r1, cr6
> !       ld r1, @r0+     ; restore ACCL
> !       mvtaclo r1
> !       ld r1, @r0+     ; restore ACCH
> !       mvtachi r1
> !       seth r0, #shigh(registers)
> !       add3 r0, r0, #low(registers)
> !       ld r1, @(4,r0)  ; restore r1
> !       ld r0, @r0      ; restore r0
>         rte");
> 
>   /* General trap handler, called after the registers have been stashed.
> --- 1278,1319 ----
>       registers[SPI] = registers[R15];
>   }
> 
> ! asm ("\n\
> ! restore_and_return:\n\
> !       seth r0, #shigh(registers+8)\n\
> !       add3 r0, r0, #low(registers+8)\n\
> !       ld r2, @r0+     ; restore r2\n\
> !       ld r3, @r0+     ; restore r3\n\
> !       ld r4, @r0+     ; restore r4\n\
> !       ld r5, @r0+     ; restore r5\n\
> !       ld r6, @r0+     ; restore r6\n\
> !       ld r7, @r0+     ; restore r7\n\
> !       ld r8, @r0+     ; restore r8\n\
> !       ld r9, @r0+     ; restore r9\n\
> !       ld r10, @r0+    ; restore r10\n\
> !       ld r11, @r0+    ; restore r11\n\
> !       ld r12, @r0+    ; restore r12\n\
> !       ld r13, @r0+    ; restore r13\n\
> !       ld r14, @r0+    ; restore r14\n\
> !       ld r15, @r0+    ; restore r15\n\
> !       addi r0, #4     ; don't restore PSW (rte will do it)\n\
> !       ld r1, @r0+     ; restore cr1 == CBR (no-op, because it's read only)\n\
> !       mvtc r1, cr1\n\
> !       ld r1, @r0+     ; restore cr2 == SPI\n\
> !       mvtc r1, cr2\n\
> !       ld r1, @r0+     ; restore cr3 == SPU\n\
> !       mvtc r1, cr3\n\
> !       addi r0, #4     ; skip BPC\n\
> !       ld r1, @r0+     ; restore cr6 (BPC) == PC\n\
> !       mvtc r1, cr6\n\
> !       ld r1, @r0+     ; restore ACCL\n\
> !       mvtaclo r1\n\
> !       ld r1, @r0+     ; restore ACCH\n\
> !       mvtachi r1\n\
> !       seth r0, #shigh(registers)\n\
> !       add3 r0, r0, #low(registers)\n\
> !       ld r1, @(4,r0)  ; restore r1\n\
> !       ld r0, @r0      ; restore r0\n\
>         rte");
> 
>   /* General trap handler, called after the registers have been stashed.
> *************** static void
> *** 1323,1526 ****
>   process_exception (int num)
>   {
>     cleanup_stash ();
> !   asm volatile ("
> !       seth r1, #shigh(stackPtr)
> !       add3 r1, r1, #low(stackPtr)
> !       ld r15, @r1             ; setup local stack (protect user stack)
> !       mv r0, %0
> !       bl handle_exception
>         bl restore_and_return"
>                 : : "r" (num) : "r0", "r1");
>   }
> 
>   void _catchException0 ();
> 
> ! asm ("
> ! _catchException0:
> !       push lr
> !       bl stash_registers
> !       ; Note that at this point the pushed value of `lr' has been popped
> !       ldi r0, #0
>         bl process_exception");
> 
>   void _catchException1 ();
> 
> ! asm ("
> ! _catchException1:
> !       push lr
> !       bl stash_registers
> !       ; Note that at this point the pushed value of `lr' has been popped
> !       bl cleanup_stash
> !       seth r1, #shigh(stackPtr)
> !       add3 r1, r1, #low(stackPtr)
> !       ld r15, @r1             ; setup local stack (protect user stack)
> !       seth r1, #shigh(registers + 21*4) ; PC
> !       add3 r1, r1, #low(registers + 21*4)
> !       ld r0, @r1
> !       addi r0, #-4            ; back up PC for breakpoint trap.
> !       st r0, @r1              ; FIXME: what about bp in right slot?
> !       ldi r0, #1
> !       bl handle_exception
>         bl restore_and_return");
> 
>   void _catchException2 ();
> 
> ! asm ("
> ! _catchException2:
> !       push lr
> !       bl stash_registers
> !       ; Note that at this point the pushed value of `lr' has been popped
> !       ldi r0, #2
>         bl process_exception");
> 
>   void _catchException3 ();
> 
> ! asm ("
> ! _catchException3:
> !       push lr
> !       bl stash_registers
> !       ; Note that at this point the pushed value of `lr' has been popped
> !       ldi r0, #3
>         bl process_exception");
> 
>   void _catchException4 ();
> 
> ! asm ("
> ! _catchException4:
> !       push lr
> !       bl stash_registers
> !       ; Note that at this point the pushed value of `lr' has been popped
> !       ldi r0, #4
>         bl process_exception");
> 
>   void _catchException5 ();
> 
> ! asm ("
> ! _catchException5:
> !       push lr
> !       bl stash_registers
> !       ; Note that at this point the pushed value of `lr' has been popped
> !       ldi r0, #5
>         bl process_exception");
> 
>   void _catchException6 ();
> 
> ! asm ("
> ! _catchException6:
> !       push lr
> !       bl stash_registers
> !       ; Note that at this point the pushed value of `lr' has been popped
> !       ldi r0, #6
>         bl process_exception");
> 
>   void _catchException7 ();
> 
> ! asm ("
> ! _catchException7:
> !       push lr
> !       bl stash_registers
> !       ; Note that at this point the pushed value of `lr' has been popped
> !       ldi r0, #7
>         bl process_exception");
> 
>   void _catchException8 ();
> 
> ! asm ("
> ! _catchException8:
> !       push lr
> !       bl stash_registers
> !       ; Note that at this point the pushed value of `lr' has been popped
> !       ldi r0, #8
>         bl process_exception");
> 
>   void _catchException9 ();
> 
> ! asm ("
> ! _catchException9:
> !       push lr
> !       bl stash_registers
> !       ; Note that at this point the pushed value of `lr' has been popped
> !       ldi r0, #9
>         bl process_exception");
> 
>   void _catchException10 ();
> 
> ! asm ("
> ! _catchException10:
> !       push lr
> !       bl stash_registers
> !       ; Note that at this point the pushed value of `lr' has been popped
> !       ldi r0, #10
>         bl process_exception");
> 
>   void _catchException11 ();
> 
> ! asm ("
> ! _catchException11:
> !       push lr
> !       bl stash_registers
> !       ; Note that at this point the pushed value of `lr' has been popped
> !       ldi r0, #11
>         bl process_exception");
> 
>   void _catchException12 ();
> 
> ! asm ("
> ! _catchException12:
> !       push lr
> !       bl stash_registers
> !       ; Note that at this point the pushed value of `lr' has been popped
> !       ldi r0, #12
>         bl process_exception");
> 
>   void _catchException13 ();
> 
> ! asm ("
> ! _catchException13:
> !       push lr
> !       bl stash_registers
> !       ; Note that at this point the pushed value of `lr' has been popped
> !       ldi r0, #13
>         bl process_exception");
> 
>   void _catchException14 ();
> 
> ! asm ("
> ! _catchException14:
> !       push lr
> !       bl stash_registers
> !       ; Note that at this point the pushed value of `lr' has been popped
> !       ldi r0, #14
>         bl process_exception");
> 
>   void _catchException15 ();
> 
> ! asm ("
> ! _catchException15:
> !       push lr
> !       bl stash_registers
> !       ; Note that at this point the pushed value of `lr' has been popped
> !       ldi r0, #15
>         bl process_exception");
> 
>   void _catchException16 ();
> 
> ! asm ("
> ! _catchException16:
> !       push lr
> !       bl stash_registers
> !       ; Note that at this point the pushed value of `lr' has been popped
> !       ldi r0, #16
>         bl process_exception");
> 
>   void _catchException17 ();
> 
> ! asm ("
> ! _catchException17:
> !       push lr
> !       bl stash_registers
> !       ; Note that at this point the pushed value of `lr' has been popped
> !       ldi r0, #17
>         bl process_exception");
> 
> 
> --- 1323,1526 ----
>   process_exception (int num)
>   {
>     cleanup_stash ();
> !   asm volatile ("\n\
> !       seth r1, #shigh(stackPtr)\n\
> !       add3 r1, r1, #low(stackPtr)\n\
> !       ld r15, @r1             ; setup local stack (protect user stack)\n\
> !       mv r0, %0\n\
> !       bl handle_exception\n\
>         bl restore_and_return"
>                 : : "r" (num) : "r0", "r1");
>   }
> 
>   void _catchException0 ();
> 
> ! asm ("\n\
> ! _catchException0:\n\
> !       push lr\n\
> !       bl stash_registers\n\
> !       ; Note that at this point the pushed value of `lr' has been popped\n\
> !       ldi r0, #0\n\
>         bl process_exception");
> 
>   void _catchException1 ();
> 
> ! asm ("\n\
> ! _catchException1:\n\
> !       push lr\n\
> !       bl stash_registers\n\
> !       ; Note that at this point the pushed value of `lr' has been popped\n\
> !       bl cleanup_stash\n\
> !       seth r1, #shigh(stackPtr)\n\
> !       add3 r1, r1, #low(stackPtr)\n\
> !       ld r15, @r1             ; setup local stack (protect user stack)\n\
> !       seth r1, #shigh(registers + 21*4) ; PC\n\
> !       add3 r1, r1, #low(registers + 21*4)\n\
> !       ld r0, @r1\n\
> !       addi r0, #-4            ; back up PC for breakpoint trap.\n\
> !       st r0, @r1              ; FIXME: what about bp in right slot?\n\
> !       ldi r0, #1\n\
> !       bl handle_exception\n\
>         bl restore_and_return");
> 
>   void _catchException2 ();
> 
> ! asm ("\n\
> ! _catchException2:\n\
> !       push lr\n\
> !       bl stash_registers\n\
> !       ; Note that at this point the pushed value of `lr' has been popped\n\
> !       ldi r0, #2\n\
>         bl process_exception");
> 
>   void _catchException3 ();
> 
> ! asm ("\n\
> ! _catchException3:\n\
> !       push lr\n\
> !       bl stash_registers\n\
> !       ; Note that at this point the pushed value of `lr' has been popped\n\
> !       ldi r0, #3\n\
>         bl process_exception");
> 
>   void _catchException4 ();
> 
> ! asm ("\n\
> ! _catchException4:\n\
> !       push lr\n\
> !       bl stash_registers\n\
> !       ; Note that at this point the pushed value of `lr' has been popped\n\
> !       ldi r0, #4\n\
>         bl process_exception");
> 
>   void _catchException5 ();
> 
> ! asm ("\n\
> ! _catchException5:\n\
> !       push lr\n\
> !       bl stash_registers\n\
> !       ; Note that at this point the pushed value of `lr' has been popped\n\
> !       ldi r0, #5\n\
>         bl process_exception");
> 
>   void _catchException6 ();
> 
> ! asm ("\n\
> ! _catchException6:\n\
> !       push lr\n\
> !       bl stash_registers\n\
> !       ; Note that at this point the pushed value of `lr' has been popped\n\
> !       ldi r0, #6\n\
>         bl process_exception");
> 
>   void _catchException7 ();
> 
> ! asm ("\n\
> ! _catchException7:\n\
> !       push lr\n\
> !       bl stash_registers\n\
> !       ; Note that at this point the pushed value of `lr' has been popped\n\
> !       ldi r0, #7\n\
>         bl process_exception");
> 
>   void _catchException8 ();
> 
> ! asm ("\n\
> ! _catchException8:\n\
> !       push lr\n\
> !       bl stash_registers\n\
> !       ; Note that at this point the pushed value of `lr' has been popped\n\
> !       ldi r0, #8\n\
>         bl process_exception");
> 
>   void _catchException9 ();
> 
> ! asm ("\n\
> ! _catchException9:\n\
> !       push lr\n\
> !       bl stash_registers\n\
> !       ; Note that at this point the pushed value of `lr' has been popped\n\
> !       ldi r0, #9\n\
>         bl process_exception");
> 
>   void _catchException10 ();
> 
> ! asm ("\n\
> ! _catchException10:\n\
> !       push lr\n\
> !       bl stash_registers\n\
> !       ; Note that at this point the pushed value of `lr' has been popped\n\
> !       ldi r0, #10\n\
>         bl process_exception");
> 
>   void _catchException11 ();
> 
> ! asm ("\n\
> ! _catchException11:\n\
> !       push lr\n\
> !       bl stash_registers\n\
> !       ; Note that at this point the pushed value of `lr' has been popped\n\
> !       ldi r0, #11\n\
>         bl process_exception");
> 
>   void _catchException12 ();
> 
> ! asm ("\n\
> ! _catchException12:\n\
> !       push lr\n\
> !       bl stash_registers\n\
> !       ; Note that at this point the pushed value of `lr' has been popped\n\
> !       ldi r0, #12\n\
>         bl process_exception");
> 
>   void _catchException13 ();
> 
> ! asm ("\n\
> ! _catchException13:\n\
> !       push lr\n\
> !       bl stash_registers\n\
> !       ; Note that at this point the pushed value of `lr' has been popped\n\
> !       ldi r0, #13\n\
>         bl process_exception");
> 
>   void _catchException14 ();
> 
> ! asm ("\n\
> ! _catchException14:\n\
> !       push lr\n\
> !       bl stash_registers\n\
> !       ; Note that at this point the pushed value of `lr' has been popped\n\
> !       ldi r0, #14\n\
>         bl process_exception");
> 
>   void _catchException15 ();
> 
> ! asm ("\n\
> ! _catchException15:\n\
> !       push lr\n\
> !       bl stash_registers\n\
> !       ; Note that at this point the pushed value of `lr' has been popped\n\
> !       ldi r0, #15\n\
>         bl process_exception");
> 
>   void _catchException16 ();
> 
> ! asm ("\n\
> ! _catchException16:\n\
> !       push lr\n\
> !       bl stash_registers\n\
> !       ; Note that at this point the pushed value of `lr' has been popped\n\
> !       ldi r0, #16\n\
>         bl process_exception");
> 
>   void _catchException17 ();
> 
> ! asm ("\n\
> ! _catchException17:\n\
> !       push lr\n\
> !       bl stash_registers\n\
> !       ; Note that at this point the pushed value of `lr' has been popped\n\
> !       ldi r0, #17\n\
>         bl process_exception");
> 
>


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