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[PATCH] sh-sim clean-ups



2003-07-23  Michael Snyder  <msnyder@redhat.com>

	* gencode.c: A few more fix-ups of refs and defs.
	(frchg): Raise SIGILL if in double-precision mode.
	(ldtlb): We don't simulate cache, so this is a no-op.
	(movsxy_tab): Correct a few bit pattern errors.

Index: gencode.c
===================================================================
RCS file: /cvs/src/src/sim/sh/gencode.c,v
retrieving revision 1.15
diff -p -r1.15 gencode.c
*** gencode.c	23 Jul 2003 21:47:28 -0000	1.15
--- gencode.c	24 Jul 2003 00:33:10 -0000
*************** op tab[] =
*** 372,378 ****
      "}",
    },
    /* sh2e */
!   { "", "m", "fmov.s @<REG_M>+,<FREG_N>", "1111nnnnmmmm1001",
      /* sh4 */
      "if (FPSCR_SZ) {",
      "  MA (2);",
--- 372,378 ----
      "}",
    },
    /* sh2e */
!   { "m", "m", "fmov.s @<REG_M>+,<FREG_N>", "1111nnnnmmmm1001",
      /* sh4 */
      "if (FPSCR_SZ) {",
      "  MA (2);",
*************** op tab[] =
*** 442,448 ****
  
    /* sh4 */
    { "", "", "frchg", "1111101111111101",
!     "SET_FPSCR (GET_FPSCR() ^ FPSCR_MASK_FR);",
    },
  
    /* sh4 */
--- 442,451 ----
  
    /* sh4 */
    { "", "", "frchg", "1111101111111101",
!     "if (FPSCR_PR)",
!     "  RAISE_EXCEPTION (SIGILL);",
!     "else",
!     "  SET_FPSCR (GET_FPSCR() ^ FPSCR_MASK_FR);",
    },
  
    /* sh4 */
*************** op tab[] =
*** 573,579 ****
    },
  
    { "", "", "ldtlb", "0000000000111000",
!     "/* FIXME: XXX*/ abort();",
    },
  
    { "nm", "nm", "mac.l @<REG_M>+,@<REG_N>+", "0000nnnnmmmm1111",
--- 576,582 ----
    },
  
    { "", "", "ldtlb", "0000000000111000",
!     "/* We don't implement cache or tlb, so this is a noop.  */",
    },
  
    { "nm", "nm", "mac.l @<REG_M>+,@<REG_N>+", "0000nnnnmmmm1111",
*************** op tab[] =
*** 800,816 ****
    },
  
    { "", "n", "ocbi @<REG_N>", "0000nnnn10010011",
!     "RSBAT (R[n]); /* Take exceptions like byte load.  */",
      "/* FIXME: Cache not implemented */",
    },
  
    { "", "n", "ocbp @<REG_N>", "0000nnnn10100011",
!     "RSBAT (R[n]); /* Take exceptions like byte load.  */",
      "/* FIXME: Cache not implemented */",
    },
  
    { "", "n", "ocbwb @<REG_N>", "0000nnnn10110011",
!     "RSBAT (R[n]); /* Take exceptions like byte load.  */",
      "/* FIXME: Cache not implemented */",
    },
  
--- 803,819 ----
    },
  
    { "", "n", "ocbi @<REG_N>", "0000nnnn10010011",
!     "RSBAT (R[n]); /* Take exceptions like byte load, otherwise noop.  */",
      "/* FIXME: Cache not implemented */",
    },
  
    { "", "n", "ocbp @<REG_N>", "0000nnnn10100011",
!     "RSBAT (R[n]); /* Take exceptions like byte load, otherwise noop.  */",
      "/* FIXME: Cache not implemented */",
    },
  
    { "", "n", "ocbwb @<REG_N>", "0000nnnn10110011",
!     "RSBAT (R[n]); /* Take exceptions like byte load, otherwise noop.  */",
      "/* FIXME: Cache not implemented */",
    },
  
*************** op movsxy_tab[] =
*** 1246,1252 ****
      "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : 2;",
      "iword &= 0xfd53; goto top;",
    },
!   { "n", "n8","movx.w @<REG_x>+REG_8,<DSP_XX>", "111100xxXX001000",
      "DSP_R (m) = RSWAT (R[n]) << 16;",
      "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : R[8];",
      "iword &= 0xfd53; goto top;",
--- 1249,1255 ----
      "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : 2;",
      "iword &= 0xfd53; goto top;",
    },
!   { "n", "n8","movx.w @<REG_x>+REG_8,<DSP_XX>", "111100xxXX001100",
      "DSP_R (m) = RSWAT (R[n]) << 16;",
      "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : R[8];",
      "iword &= 0xfd53; goto top;",
*************** op movsxy_tab[] =
*** 1272,1278 ****
      "DSP_R (m) = RSWAT (R[n]) << 16;",
      "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : 2;",
    },
!   { "n", "n9","movy.w @<REG_y>+REG_9,<DSP_YY>", "111100yyYY000010",
      "DSP_R (m) = RSWAT (R[n]) << 16;",
      "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : R[9];",
    },
--- 1275,1281 ----
      "DSP_R (m) = RSWAT (R[n]) << 16;",
      "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : 2;",
    },
!   { "n", "n9","movy.w @<REG_y>+REG_9,<DSP_YY>", "111100yyYY000011",
      "DSP_R (m) = RSWAT (R[n]) << 16;",
      "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : R[9];",
    },
*************** op movsxy_tab[] =
*** 1283,1289 ****
      "WWAT (R[n], DSP_R (m) >> 16);",
      "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : 2;",
    },
!   { "n", "n9", "movy.w <DSP_Aa>,@<REG_y>+REG_9", "111100yyAA010010",
      "WWAT (R[n], DSP_R (m) >> 16);",
      "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : R[9];",
    },
--- 1286,1292 ----
      "WWAT (R[n], DSP_R (m) >> 16);",
      "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : 2;",
    },
!   { "n", "n9", "movy.w <DSP_Aa>,@<REG_y>+REG_9", "111100yyAA010011",
      "WWAT (R[n], DSP_R (m) >> 16);",
      "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : R[9];",
    },
*************** gensim_caselist (p)
*** 2138,2147 ****
  	{
  	  switch (*s)
  	    {
!               fprintf (stderr, "gencode/gensim_caselist: illegal char '%c'\n",
!                        *s);
!               exit (1);
!               break;
  	    case '0':
  	    case '1':
  	      s += 2;
--- 2141,2151 ----
  	{
  	  switch (*s)
  	    {
! 	    default:
! 	      fprintf (stderr, "gencode/gensim_caselist: illegal char '%c'\n",
! 		       *s);
! 	      exit (1);
! 	      break;
  	    case '0':
  	    case '1':
  	      s += 2;
*************** expand_ppi_code (val, i, s)
*** 2335,2344 ****
      {
        switch (s[0])
  	{
!         default:
!           fprintf (stderr, "gencode/expand_ppi_code: Illegal char '%c'\n",
!                    s[0]);
!           exit (2);
  	  break;
  	/* The last eight bits are disregarded for the switch table.  */
  	case 'm':
--- 2339,2348 ----
      {
        switch (s[0])
  	{
! 	default:
! 	  fprintf (stderr, "gencode/expand_ppi_code: Illegal char '%c'\n",
! 		   s[0]);
! 	  exit (2);
  	  break;
  	/* The last eight bits are disregarded for the switch table.  */
  	case 'm':

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