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Re: [patch/RFA] multiarch INSTRUCTION_NULLIFIED
- From: Randolph Chung <randolph at tausq dot org>
- To: gdb-patches at sources dot redhat dot com
- Date: Wed, 1 Dec 2004 08:25:24 -0800
- Subject: Re: [patch/RFA] multiarch INSTRUCTION_NULLIFIED
- Reply-to: Randolph Chung <randolph at tausq dot org>
In-Reply-To: <BDD32F47.81A3%schlie@comcast.net>
> A point that may be worth considering is that on architectures which support
> jump/branch delay slots, the branch and delay slot is actually logically
> executed as single compound instruction, treated by the machine as a unified
> whole.
i don't think this is true for hppa. for instance you can do a hardware
singlestep into the delay slot of a branch insn by setting the recovery
counter appropriately. this will cause an hardware interruption which
the kernel can translate to a SIGTRAP.
nullification is also a more general concept on hppa which doesn't only
apply to branch instructions. A lot of ALU instructions can also
conditioanlly nullify the next insn, which potentially could belong to a
different line of source code. gcc uses this to implement if-conversion,
for example.
randolph
--
Randolph Chung
Debian GNU/Linux Developer, hppa/ia64 ports
http://www.tausq.org/