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[patch] Add ms2 support


This patch adds support for ms2 to gdb. I unfortunately committed a part of this patch with the warning cleanup. This changelog mentions that piece.

tested on ms2-elf, ok?

nathan
--
Nathan Sidwell    ::   http://www.codesourcery.com   ::     CodeSourcery LLC
nathan@codesourcery.com    ::     http://www.planetfall.pwp.blueyonder.co.uk

2005-12-01  Nathan Sidwell  <nathan@codesourcery.com>

	Add ms2 support.
	* ms1-tdep.c (ms1_register_type): Check for ms2.
	(ms1_breakpoint_from_pc): ms2 has a different break instruction.
	(ms1_pseudo_register_read, ms1_pseudo_register_write,
	ms1_registers_info): Add ms2.

Index: ms1-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/ms1-tdep.c,v
retrieving revision 1.2
diff -c -3 -p -r1.2 ms1-tdep.c
*** ms1-tdep.c	1 Dec 2005 13:19:58 -0000	1.2
--- ms1-tdep.c	1 Dec 2005 13:32:47 -0000
*************** ms1_register_type (struct gdbarch *arch,
*** 198,204 ****
  	case MS1_COPRO_PSEUDOREG_REGNUM:
  	  return copro_type;
  	case MS1_MAC_PSEUDOREG_REGNUM:
! 	  if (gdbarch_bfd_arch_info (arch)->mach == bfd_mach_mrisc2)
  	    return builtin_type_uint64;
  	  else
  	    return builtin_type_uint32;
--- 198,205 ----
  	case MS1_COPRO_PSEUDOREG_REGNUM:
  	  return copro_type;
  	case MS1_MAC_PSEUDOREG_REGNUM:
! 	  if (gdbarch_bfd_arch_info (arch)->mach == bfd_mach_mrisc2
! 	      || gdbarch_bfd_arch_info (arch)->mach == bfd_mach_ms2)
  	    return builtin_type_uint64;
  	  else
  	    return builtin_type_uint32;
*************** ms1_skip_prologue (CORE_ADDR pc)
*** 362,376 ****
  /* The breakpoint instruction must be the same size as the smallest
     instruction in the instruction set.
  
!    The BP for ms1 is defined as 0x68000000.  */
  
  static const gdb_byte *
  ms1_breakpoint_from_pc (CORE_ADDR *bp_addr, int *bp_size)
  {
!   static gdb_byte breakpoint[] = { 0x68, 0, 0, 0 };
  
    *bp_size = 4;
!   return breakpoint;
  }
  
  /* Fetch the pseudo registers:
--- 363,382 ----
  /* The breakpoint instruction must be the same size as the smallest
     instruction in the instruction set.
  
!    The BP for ms1 is defined as 0x68000000 (BREAK).
!    The BP for ms2 is defined as 0x69000000 (illegal)  */
  
  static const gdb_byte *
  ms1_breakpoint_from_pc (CORE_ADDR *bp_addr, int *bp_size)
  {
!   static gdb_byte ms1_breakpoint[] = { 0x68, 0, 0, 0 };
!   static gdb_byte ms2_breakpoint[] = { 0x69, 0, 0, 0 };
  
    *bp_size = 4;
!   if (gdbarch_bfd_arch_info (current_gdbarch)->mach == bfd_mach_ms2)
!     return ms2_breakpoint;
!   
!   return ms1_breakpoint;
  }
  
  /* Fetch the pseudo registers:
*************** ms1_pseudo_register_read (struct gdbarch
*** 394,400 ****
        break;
      case MS1_MAC_REGNUM:
      case MS1_MAC_PSEUDOREG_REGNUM:
!       if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2)
  	{
  	  ULONGEST oldmac = 0, ext_mac = 0;
  	  ULONGEST newmac;
--- 400,407 ----
        break;
      case MS1_MAC_REGNUM:
      case MS1_MAC_PSEUDOREG_REGNUM:
!       if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
! 	  || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
  	{
  	  ULONGEST oldmac = 0, ext_mac = 0;
  	  ULONGEST newmac;
*************** ms1_pseudo_register_write (struct gdbarc
*** 438,444 ****
        break;
      case MS1_MAC_REGNUM:
      case MS1_MAC_PSEUDOREG_REGNUM:
!       if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2)
  	{
  	  /* The 8-byte MAC pseudo-register must be broken down into two
  	     32-byte registers.  */
--- 445,452 ----
        break;
      case MS1_MAC_REGNUM:
      case MS1_MAC_PSEUDOREG_REGNUM:
!       if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
! 	  || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
  	{
  	  /* The 8-byte MAC pseudo-register must be broken down into two
  	     32-byte registers.  */
*************** ms1_registers_info (struct gdbarch *gdba
*** 549,564 ****
  
  	  /* Get the two "real" mac registers.  */
  	  frame_register_read (frame, MS1_MAC_REGNUM, buf);
! 	  oldmac = extract_unsigned_integer (buf,
! 					     register_size (gdbarch,
! 							    MS1_MAC_REGNUM));
  	  if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
  	      || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
  	    {
  	      frame_register_read (frame, MS1_EXMAC_REGNUM, buf);
! 	      ext_mac = extract_unsigned_integer (buf,
! 						  register_size (gdbarch,
! 								 MS1_EXMAC_REGNUM));
  	    }
  	  else
  	    ext_mac = 0;
--- 557,570 ----
  
  	  /* Get the two "real" mac registers.  */
  	  frame_register_read (frame, MS1_MAC_REGNUM, buf);
! 	  oldmac = extract_unsigned_integer
! 	    (buf, register_size (gdbarch, MS1_MAC_REGNUM));
  	  if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
  	      || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
  	    {
  	      frame_register_read (frame, MS1_EXMAC_REGNUM, buf);
! 	      ext_mac = extract_unsigned_integer
! 		(buf, register_size (gdbarch, MS1_EXMAC_REGNUM));
  	    }
  	  else
  	    ext_mac = 0;

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