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Re: [RFA 6/8] New port: TI C6x: gdbserver


On 07/21/2011 01:55 AM, Pedro Alves wrote:
> On Wednesday 20 July 2011 03:09:18, Yao Qi wrote:
> 
>> +static CORE_ADDR
>> +tic6x_get_pc (struct regcache *regcache)
>> +{
>> +  union tic6x_register pc;
>> +  collect_register_by_name (regcache, "PC", pc.buf);
> 
> Empty line missing after declaration.  At least one more instance.
> 

Fixed it here and other places.

>> +int *tic6x_regmap;
>> +
> ...
>> +unsigned int tic6x_breakpoint;
> 
> Could be static?
> 

Yes, they can be static.  Fixed.

>>  s390-linux32-expedite = r14,r15,pswa
>>  s390-linux64-expedite = r14l,r15l,pswa
>>  s390x-linux64-expedite = r14,r15,pswa
>> +tic6x-linux-expedite = A15,PC
> 
> Stupid question: is there a reason all register
> names are all caps in C6x?
> 

Because all register names are capitalized in TI's reference guide and
"TMS320C6000 Assembly Language Tools User's Guide".

>> +++ b/gdb/features/tic6x-linux.xml
>> @@ -0,0 +1,12 @@
>> +<?xml version="1.0"?>
>> +<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
>> +
>> +     Copying and distribution of this file, with or without modification,
>> +     are permitted in any medium without royalty provided the copyright
>> +     notice and this notice are preserved.  -->
>> +
>> +<!DOCTYPE target SYSTEM "gdb-target.dtd">
>> +<target>
>> +  <architecture>tic6x</architecture>
> 
> Since this is for linux only, add:
> 
>  <osabi>GNU/Linux</osabi>
> 
>> +  <xi:include href="tic6x-cpu.xml"/>
>> +</target>
> 

Done.

>> +#elif defined(__TMS320C6X__)
>> +#define PT_TEXT_ADDR     0x10000*4
>> +#define PT_DATA_ADDR     0x10004*4
>> +#define PT_TEXT_END_ADDR 0x10008*4
> 
> Surround with parens as principle to avoid precedence
> surprises:
> 
>   #define PT_TEXT_ADDR     (0x10000*4)
> 

Done.

>> +<!DOCTYPE feature SYSTEM "gdb-target.dtd">
>> +<feature name="org.gnu.gdb.tic6x.cpu">
>> +  <reg name="A0" bitsize="32"/>
>> +  <reg name="A1" bitsize="32"/>
>> +  <reg name="A2" bitsize="32"/>
> 
> ...
> 
> These are all general purpose, core registers, right?
> 

Not really.  A0-31 and B0-31 are general purpose registers, even there
are some difference among different C6x cores (such as C62x, C67x, and
C64x).  The rest of them can be regarded as control registers and status
registers.  The target description should be refined for the different
C6x cores, and I'd like to do it in follow-up patches later.  Is it OK?

-- 
Yao (éå)
2011-07-19  Andrew Jenner  <andrew@codesourcery.com>
            Yao Qi  <yao@codesourcery.com>

        gdb/
        * features/Makefile (WHICH): Add tic6x-linux.
        * features/tic6x-cpu.xml: New.
        * features/tic6x-linux.xml: New.
        * regformats/tic6x-linux.dat: New.

        gdb/gdbserver/
        * Makefile.in (clean): Remove tic6x-linux.c.
        (linux-tic6x-low.o, tic6x-linux.o, tic6x-linux.c): New rules.
        * configure.srv: Add support for tic6x-*-uclinux.
        * linux-tic6x-low.c: New.
        * linux-low.c (PT_TEXT_ADDR, PT_DATA_ADDR, PT_TEXT_END_ADDR):
	Define.
---
 gdb/features/Makefile           |    3 +-
 gdb/features/tic6x-cpu.xml      |  137 +++++++++++++++
 gdb/features/tic6x-linux.xml    |   13 ++
 gdb/gdbserver/Makefile.in       |    5 +
 gdb/gdbserver/configure.srv     |    6 +
 gdb/gdbserver/linux-low.c       |    4 +
 gdb/gdbserver/linux-tic6x-low.c |  346 +++++++++++++++++++++++++++++++++++++++
 gdb/regformats/tic6x-linux.dat  |  131 +++++++++++++++
 8 files changed, 644 insertions(+), 1 deletions(-)
 create mode 100644 gdb/features/tic6x-cpu.xml
 create mode 100644 gdb/features/tic6x-linux.xml
 create mode 100644 gdb/gdbserver/linux-tic6x-low.c
 create mode 100644 gdb/regformats/tic6x-linux.dat

diff --git a/gdb/features/Makefile b/gdb/features/Makefile
index 4e8e7ee..396ce8a 100644
--- a/gdb/features/Makefile
+++ b/gdb/features/Makefile
@@ -41,7 +41,7 @@ WHICH = arm-with-iwmmxt arm-with-vfpv2 arm-with-vfpv3 arm-with-neon \
 	rs6000/powerpc-32l rs6000/powerpc-altivec32l rs6000/powerpc-e500l \
 	rs6000/powerpc-64l rs6000/powerpc-altivec64l rs6000/powerpc-vsx32l \
 	rs6000/powerpc-vsx64l rs6000/powerpc-cell32l rs6000/powerpc-cell64l \
-	s390-linux32 s390-linux64 s390x-linux64
+	s390-linux32 s390-linux64 s390x-linux64 tic6x-linux
 
 # Record which registers should be sent to GDB by default after stop.
 arm-expedite = r11,sp,pc
@@ -63,6 +63,7 @@ rs6000/powerpc-cell64l-expedite = r1,pc,r0,orig_r3,r4
 s390-linux32-expedite = r14,r15,pswa
 s390-linux64-expedite = r14l,r15l,pswa
 s390x-linux64-expedite = r14,r15,pswa
+tic6x-linux-expedite = A15,PC
 
 
 XSLTPROC = xsltproc
diff --git a/gdb/features/tic6x-cpu.xml b/gdb/features/tic6x-cpu.xml
new file mode 100644
index 0000000..4fa9f41
--- /dev/null
+++ b/gdb/features/tic6x-cpu.xml
@@ -0,0 +1,137 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+     Copying and distribution of this file, with or without modification,
+     are permitted in any medium without royalty provided the copyright
+     notice and this notice are preserved.  -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.tic6x.cpu">
+  <reg name="A0" bitsize="32"/>
+  <reg name="A1" bitsize="32"/>
+  <reg name="A2" bitsize="32"/>
+  <reg name="A3" bitsize="32"/>
+  <reg name="A4" bitsize="32"/>
+  <reg name="A5" bitsize="32"/>
+  <reg name="A6" bitsize="32"/>
+  <reg name="A7" bitsize="32"/>
+  <reg name="A8" bitsize="32"/>
+  <reg name="A9" bitsize="32"/>
+  <reg name="A10" bitsize="32"/>
+  <reg name="A11" bitsize="32"/>
+  <reg name="A12" bitsize="32"/>
+  <reg name="A13" bitsize="32"/>
+  <reg name="A14" bitsize="32"/>
+  <reg name="A15" bitsize="32"/>
+  <reg name="B0" bitsize="32"/>
+  <reg name="B1" bitsize="32"/>
+  <reg name="B2" bitsize="32"/>
+  <reg name="B3" bitsize="32"/>
+  <reg name="B4" bitsize="32"/>
+  <reg name="B5" bitsize="32"/>
+  <reg name="B6" bitsize="32"/>
+  <reg name="B7" bitsize="32"/>
+  <reg name="B8" bitsize="32"/>
+  <reg name="B9" bitsize="32"/>
+  <reg name="B10" bitsize="32"/>
+  <reg name="B11" bitsize="32"/>
+  <reg name="B12" bitsize="32"/>
+  <reg name="B13" bitsize="32"/>
+  <reg name="B14" bitsize="32"/>
+  <reg name="B15" bitsize="32"/>
+  <reg name="None" bitsize="32"/>
+  <reg name="PC" bitsize="32"/>
+  <reg name="IRP" bitsize="32"/>
+  <reg name="IFR" bitsize="32"/>
+  <reg name="NPR" bitsize="32"/>
+  <reg name="A16" bitsize="32"/>
+  <reg name="A17" bitsize="32"/>
+  <reg name="A18" bitsize="32"/>
+  <reg name="A19" bitsize="32"/>
+  <reg name="A20" bitsize="32"/>
+  <reg name="A21" bitsize="32"/>
+  <reg name="A22" bitsize="32"/>
+  <reg name="A23" bitsize="32"/>
+  <reg name="A24" bitsize="32"/>
+  <reg name="A25" bitsize="32"/>
+  <reg name="A26" bitsize="32"/>
+  <reg name="A27" bitsize="32"/>
+  <reg name="A28" bitsize="32"/>
+  <reg name="A29" bitsize="32"/>
+  <reg name="A30" bitsize="32"/>
+  <reg name="A31" bitsize="32"/>
+  <reg name="B16" bitsize="32"/>
+  <reg name="B17" bitsize="32"/>
+  <reg name="B18" bitsize="32"/>
+  <reg name="B19" bitsize="32"/>
+  <reg name="B20" bitsize="32"/>
+  <reg name="B21" bitsize="32"/>
+  <reg name="B22" bitsize="32"/>
+  <reg name="B23" bitsize="32"/>
+  <reg name="B24" bitsize="32"/>
+  <reg name="B25" bitsize="32"/>
+  <reg name="B26" bitsize="32"/>
+  <reg name="B27" bitsize="32"/>
+  <reg name="B28" bitsize="32"/>
+  <reg name="B29" bitsize="32"/>
+  <reg name="B30" bitsize="32"/>
+  <reg name="B31" bitsize="32"/>
+  <reg name="AMR" bitsize="32"/>
+  <reg name="CSR" bitsize="32"/>
+  <reg name="ISR" bitsize="32"/>
+  <reg name="ICR" bitsize="32"/>
+  <reg name="IER" bitsize="32"/>
+  <reg name="ISTP" bitsize="32"/>
+  <reg name="IN" bitsize="32"/>
+  <reg name="OUT" bitsize="32"/>
+  <reg name="ACR" bitsize="32"/>
+  <reg name="ADR" bitsize="32"/>
+  <reg name="FADCR" bitsize="32"/>
+  <reg name="FAUCR" bitsize="32"/>
+  <reg name="FMCR" bitsize="32"/>
+  <reg name="GFPGFR" bitsize="32"/>
+  <reg name="DIER" bitsize="32"/>
+  <reg name="REP" bitsize="32"/>
+  <reg name="TSCL" bitsize="32"/>
+  <reg name="TSCH" bitsize="32"/>
+  <reg name="ARP" bitsize="32"/>
+  <reg name="ILC" bitsize="32"/>
+  <reg name="RILC" bitsize="32"/>
+  <reg name="DNUM" bitsize="32"/>
+  <reg name="SSR" bitsize="32"/>
+  <reg name="GPLYA" bitsize="32"/>
+  <reg name="GPLYB" bitsize="32"/>
+  <reg name="TSR" bitsize="32"/>
+  <reg name="ITSR" bitsize="32"/>
+  <reg name="NTSR" bitsize="32"/>
+  <reg name="EFR" bitsize="32"/>
+  <reg name="IERR" bitsize="32"/>
+  <reg name="DMSG" bitsize="32"/>
+  <reg name="CMSG" bitsize="32"/>
+  <reg name="DT_DMA_ADDR" bitsize="32"/>
+  <reg name="DT_DMA_DATA" bitsize="32"/>
+  <reg name="DT_DMA_CNTL" bitsize="32"/>
+  <reg name="TCU_CNTL" bitsize="32"/>
+  <reg name="RTDX_REC_CNTL" bitsize="32"/>
+  <reg name="RTDX_XMT_CNTL" bitsize="32"/>
+  <reg name="RTDX_CFG" bitsize="32"/>
+  <reg name="RTDX_RDATA" bitsize="32"/>
+  <reg name="RTDX_WDATA" bitsize="32"/>
+  <reg name="RTDX_RADDR" bitsize="32"/>
+  <reg name="RTDX_WADDR" bitsize="32"/>
+  <reg name="MFREG0" bitsize="32"/>
+  <reg name="DBG_STAT" bitsize="32"/>
+  <reg name="BRK_EN" bitsize="32"/>
+  <reg name="HWBP0_CNT" bitsize="32"/>
+  <reg name="HWBP0" bitsize="32"/>
+  <reg name="HWBP1" bitsize="32"/>
+  <reg name="HWBP2" bitsize="32"/>
+  <reg name="HWBP3" bitsize="32"/>
+  <reg name="OVERLAY" bitsize="32"/>
+  <reg name="PC_PROF" bitsize="32"/>
+  <reg name="ATSR" bitsize="32"/>
+  <reg name="TRR" bitsize="32"/>
+  <reg name="TCRR" bitsize="32"/>
+  <reg name="DESR" bitsize="32"/>
+  <reg name="DETR" bitsize="32"/>
+</feature>
diff --git a/gdb/features/tic6x-linux.xml b/gdb/features/tic6x-linux.xml
new file mode 100644
index 0000000..3c83ebf
--- /dev/null
+++ b/gdb/features/tic6x-linux.xml
@@ -0,0 +1,13 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+
+     Copying and distribution of this file, with or without modification,
+     are permitted in any medium without royalty provided the copyright
+     notice and this notice are preserved.  -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+  <architecture>tic6x</architecture>
+  <osabi>GNU/Linux</osabi>
+  <xi:include href="tic6x-cpu.xml"/>
+</target>
diff --git a/gdb/gdbserver/Makefile.in b/gdb/gdbserver/Makefile.in
index 095c706..6b905dc 100644
--- a/gdb/gdbserver/Makefile.in
+++ b/gdb/gdbserver/Makefile.in
@@ -276,6 +276,7 @@ clean:
 	rm -f powerpc-isa205-altivec32l.c powerpc-isa205-vsx32l.c powerpc-isa205-altivec64l.c
 	rm -f powerpc-isa205-vsx64l.c
 	rm -f s390-linux32.c s390-linux64.c s390x-linux64.c
+	rm -f tic6x-linux.c
 	rm -f xml-builtin.c stamp-xml
 	rm -f i386-avx.c i386-avx-linux.c
 	rm -f amd64-avx.c amd64-avx-linux.c
@@ -428,6 +429,7 @@ linux-mips-low.o: linux-mips-low.c $(linux_low_h) $(server_h) \
 linux-ppc-low.o: linux-ppc-low.c $(linux_low_h) $(server_h)
 linux-s390-low.o: linux-s390-low.c $(linux_low_h) $(server_h)
 linux-sh-low.o: linux-sh-low.c $(linux_low_h) $(server_h)
+linux-tic6x-low.o: linux-tic6x-low.c $(linux_low_h) $(server_h)
 linux-x86-low.o: linux-x86-low.c $(linux_low_h) $(server_h) \
 	$(gdb_proc_service_h) $(i386_low_h)
 linux-xtensa-low.o: linux-xtensa-low.c xtensa-xtregs.c $(linux_low_h) $(server_h)
@@ -563,6 +565,9 @@ s390-linux64.c : $(srcdir)/../regformats/s390-linux64.dat $(regdat_sh)
 s390x-linux64.o : s390x-linux64.c $(regdef_h)
 s390x-linux64.c : $(srcdir)/../regformats/s390x-linux64.dat $(regdat_sh)
 	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/s390x-linux64.dat s390x-linux64.c
+tic6x-linux.o : tic6x-linux.c $(regdef_h)
+tic6x-linux.c : $(srcdir)/../regformats/tic6x-linux.dat $(regdat_sh)
+	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/tic6x-linux.dat tic6x-linux.c
 reg-sh.o : reg-sh.c $(regdef_h)
 reg-sh.c : $(srcdir)/../regformats/reg-sh.dat $(regdat_sh)
 	$(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-sh.dat reg-sh.c
diff --git a/gdb/gdbserver/configure.srv b/gdb/gdbserver/configure.srv
index 55dd4cf..5a245fc 100644
--- a/gdb/gdbserver/configure.srv
+++ b/gdb/gdbserver/configure.srv
@@ -243,6 +243,12 @@ case "${target}" in
   spu*-*-*)		srv_regobj=reg-spu.o
 			srv_tgtobj="spu-low.o"
 			;;
+  tic6x-*-uclinux)	srv_regobj=tic6x-linux.o
+  			srv_tgtobj="linux-low.o linux-tic6x-low.o"
+			srv_linux_regsets=yes
+			srv_linux_usrregs=yes
+			srv_linux_thread_db=yes
+			;;
   x86_64-*-linux*)	srv_regobj="$srv_amd64_linux_regobj $srv_i386_linux_regobj"
 			srv_tgtobj="linux-low.o linux-x86-low.o i386-low.o i387-fp.o"
 			srv_xmlfiles="$srv_i386_linux_xmlfiles $srv_amd64_linux_xmlfiles"
diff --git a/gdb/gdbserver/linux-low.c b/gdb/gdbserver/linux-low.c
index 1e9a4fb..0f2f5de 100644
--- a/gdb/gdbserver/linux-low.c
+++ b/gdb/gdbserver/linux-low.c
@@ -4347,6 +4347,10 @@ linux_stopped_data_address (void)
 #define PT_TEXT_ADDR 220
 #define PT_TEXT_END_ADDR 224
 #define PT_DATA_ADDR 228
+#elif defined(__TMS320C6X__)
+#define PT_TEXT_ADDR     (0x10000 * 4)
+#define PT_DATA_ADDR     (0x10004 * 4)
+#define PT_TEXT_END_ADDR (0x10008 * 4)
 #endif
 
 /* Under uClinux, programs are loaded at non-zero offsets, which we need
diff --git a/gdb/gdbserver/linux-tic6x-low.c b/gdb/gdbserver/linux-tic6x-low.c
new file mode 100644
index 0000000..04be46d
--- /dev/null
+++ b/gdb/gdbserver/linux-tic6x-low.c
@@ -0,0 +1,346 @@
+/* Target dependent code for GDB on TI C6x systems.
+
+   Copyright (C) 2010, 2011
+   Free Software Foundation, Inc.
+   Contributed by Andrew Jenner <andrew@codesourcery.com>
+   Contributed by Yao Qi <yao@codesourcery.com>
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
+
+#include "server.h"
+#include "linux-low.h"
+
+#include <sys/ptrace.h>
+#include <endian.h>
+
+#include "gdb_proc_service.h"
+
+#ifndef PTRACE_GET_THREAD_AREA
+#define PTRACE_GET_THREAD_AREA 25
+#endif
+
+#define tic6x_num_regs 127
+
+#include <asm/ptrace.h>
+
+/* Defined in auto-generated file tic6x-linux.c.  */
+void init_registers_tic6x_linux (void);
+
+union tic6x_register
+{
+  unsigned char buf[4];
+
+  int reg32;
+};
+
+/* Return the ptrace ``address'' of register REGNO.  */
+
+#if __BYTE_ORDER == __BIG_ENDIAN
+static int tic6x_regmap_c64xp[] = {
+  53, 52, 55, 54, 57, 56, 59, 58,
+  61, 60, 63, 62, 65, 64, 67, 66,
+  23, 22, 25, 24, 27, 26, 29, 28,
+  31, 30, 33, 32, 35, 34, 69, 68,
+  -1,  4, -1, -1, -1, 37, 36, 39,
+  38, 41, 40, 43, 42, 45, 44, 47,
+  46, 49, 48, 51, 50,  7,  6,  9,
+   8, 11, 10, 13, 12, 15, 14, 17,
+  16, 19, 18, 21, 20, -1,  5, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+   3,  2, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1
+};
+
+static int tic6x_regmap_c64x[] = {
+  51, 50, 53, 52, 55, 54, 57, 56,
+  59, 58, 61, 60, 63, 62, 65, 64,
+  21, 20, 23, 22, 25, 24, 27, 26,
+  29, 28, 31, 30, 33, 32, 67, 66,
+  -1,  2, -1, -1, -1, 35, 34, 37,
+  36, 39, 38, 41, 40, 43, 42, 45,
+  44, 47, 46, 49, 48,  5,  4,  7,
+   6,  9,  8, 11, 10, 13, 12, 15,
+  14, 17, 16, 19, 18, -1,  3, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1
+};
+
+static int tic6x_regmap_c62x[] = {
+  19, 18, 21, 20, 23, 22, 25, 24,
+  27, 26, 29, 28, 31, 30, 33, 32,
+   5,  4,  7,  6,  9,  8, 11, 10,
+  13, 12, 15, 14, 17, 16, 35, 34,
+  -1,  2, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1,  3, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1
+};
+
+#else
+static int tic6x_regmap_c64xp[] = {
+  52, 53, 54, 55, 56, 57, 58, 59,
+  60, 61, 62, 63, 64, 65, 66, 67,
+  22, 23, 24, 25, 26, 27, 28, 29,
+  30, 31, 32, 33, 34, 35, 68, 69,
+  -1,  5, -1, -1, -1, 36, 37, 38,
+  39, 40, 41, 42, 43, 44, 45, 46,
+  47, 48, 49, 50, 51,  6,  7,  8,
+   9, 10, 11, 12, 13, 14, 15, 16,
+  17, 18, 19, 20, 31, -1,  4, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+   2,  3, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1
+};
+
+static int tic6x_regmap_c64x[] = {
+  50, 51, 52, 53, 54, 55, 56, 57,
+  58, 59, 60, 61, 62, 63, 64, 65,
+  20, 21, 22, 23, 24, 25, 26, 27,
+  28, 29, 30, 31, 32, 33, 66, 67,
+  -1,  3, -1, -1, -1, 34, 35, 36,
+  37, 38, 39, 40, 41, 42, 43, 44,
+  45, 46, 47, 48, 49,  4,  5,  6,
+   7,  8,  9, 10, 11, 12, 13, 14,
+  15, 16, 17, 18, 19, -1,  3, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1
+};
+
+static int tic6x_regmap_c62x[] = {
+  18, 19, 20, 21, 22, 23, 24, 25,
+  26, 27, 28, 29, 30, 31, 32, 33,
+   4,  5,  6,  7,  8,  9, 10, 11,
+  12, 13, 14, 15, 16, 17, 34, 35,
+  -1,  3, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1,  2, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1, -1,
+  -1, -1, -1, -1, -1, -1, -1
+};
+
+#endif
+
+extern struct linux_target_ops the_low_target;
+
+static int *tic6x_regmap;
+static unsigned int tic6x_breakpoint;
+
+static void
+tic6x_arch_setup (void)
+{
+  register unsigned int csr asm ("B2");
+  unsigned int cpuid;
+
+  init_registers_tic6x_linux ();
+
+  /* Determine the CPU we're running on to find the register order.  */
+  __asm__ ("MVC .S2 CSR,%0" : "=r" (csr) :);
+  cpuid = csr >> 24;
+  switch (cpuid)
+    {
+    case 0x00: /* C62x */
+    case 0x02: /* C67x */
+      tic6x_regmap = tic6x_regmap_c62x;
+      tic6x_breakpoint = 0x0000a122;  /* BNOP .S2 0,5 */
+      break;
+    case 0x03: /* C67x+ */
+      tic6x_regmap = tic6x_regmap_c64x;
+      tic6x_breakpoint = 0x0000a122;  /* BNOP .S2 0,5 */
+      break;
+    case 0x0c: /* C64x */
+      tic6x_regmap = tic6x_regmap_c64x;
+      tic6x_breakpoint = 0x0000a122;  /* BNOP .S2 0,5 */
+      break;
+    case 0x10: /* C64x+ */
+    case 0x14: /* C674x */
+    case 0x15: /* C66x */
+      tic6x_regmap = tic6x_regmap_c64xp;
+      tic6x_breakpoint = 0x56454314;  /* illegal opcode */
+      break;
+    default:
+      error("Unknown CPU ID 0x%02x", cpuid);
+    }
+  the_low_target.regmap = tic6x_regmap;
+}
+
+static int
+tic6x_cannot_fetch_register (int regno)
+{
+  return (tic6x_regmap[regno] == -1);
+}
+
+static int
+tic6x_cannot_store_register (int regno)
+{
+  return (tic6x_regmap[regno] == -1);
+}
+
+static CORE_ADDR
+tic6x_get_pc (struct regcache *regcache)
+{
+  union tic6x_register pc;
+
+  collect_register_by_name (regcache, "PC", pc.buf);
+  return pc.reg32;
+}
+
+static void
+tic6x_set_pc (struct regcache *regcache, CORE_ADDR pc)
+{
+  union tic6x_register newpc;
+
+  newpc.reg32 = pc;
+  supply_register_by_name (regcache, "PC", newpc.buf);
+}
+
+#define tic6x_breakpoint_len 4
+
+static int
+tic6x_breakpoint_at (CORE_ADDR where)
+{
+  unsigned int insn;
+
+  (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
+  if (insn == tic6x_breakpoint)
+    return 1;
+
+  /* If necessary, recognize more trap instructions here.  GDB only uses the
+     one.  */
+  return 0;
+}
+
+/* Fetch the thread-local storage pointer for libthread_db.  */
+
+ps_err_e
+ps_get_thread_area (const struct ps_prochandle *ph,
+                    lwpid_t lwpid, int idx, void **base)
+{
+  if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
+    return PS_ERR;
+
+  /* IDX is the bias from the thread pointer to the beginning of the
+     thread descriptor.  It has to be subtracted due to implementation
+     quirks in libthread_db.  */
+  *base = (void *) ((char *)*base - idx);
+
+  return PS_OK;
+}
+
+#ifdef HAVE_PTRACE_GETREGS
+
+static void
+tic6x_collect_register (struct regcache *regcache, int regno,
+			union tic6x_register *reg)
+{
+  union tic6x_register tmp_reg;
+
+  collect_register (regcache, regno, &tmp_reg.reg32);
+  reg->reg32 = tmp_reg.reg32;
+}
+
+static void
+tic6x_supply_register (struct regcache *regcache, int regno,
+		       const union tic6x_register *reg)
+{
+  int offset = 0;
+
+  supply_register (regcache, regno, reg->buf + offset);
+}
+
+static void
+tic6x_fill_gregset (struct regcache *regcache, void *buf)
+{
+  union tic6x_register *regset = buf;
+  int i;
+
+  for (i = 0; i < tic6x_num_regs; i++)
+    if (tic6x_regmap[i] != -1)
+      tic6x_collect_register (regcache, i, regset + tic6x_regmap[i]);
+}
+
+static void
+tic6x_store_gregset (struct regcache *regcache, const void *buf)
+{
+  const union tic6x_register *regset = buf;
+  int i;
+  char zerobuf[4];
+
+  memset (zerobuf, 0, 4);
+  for (i = 0; i < tic6x_num_regs; i++)
+    {
+      if (tic6x_regmap[i] != -1)
+	tic6x_supply_register (regcache, i, regset + tic6x_regmap[i]);
+      else
+	supply_register (regcache, i, zerobuf);
+    }
+}
+#endif /* HAVE_PTRACE_GETREGS */
+
+struct regset_info target_regsets[] = {
+#ifdef HAVE_PTRACE_GETREGS
+  { PTRACE_GETREGS, PTRACE_SETREGS, 0, 127 * 4, GENERAL_REGS,
+    tic6x_fill_gregset, tic6x_store_gregset },
+#endif /* HAVE_PTRACE_GETREGS */
+  { 0, 0, 0, -1, -1, NULL, NULL }
+};
+
+struct linux_target_ops the_low_target = {
+  tic6x_arch_setup,
+  tic6x_num_regs,
+  0,
+  tic6x_cannot_fetch_register,
+  tic6x_cannot_store_register,
+  tic6x_get_pc,
+  tic6x_set_pc,
+  (const unsigned char *) &tic6x_breakpoint,
+  tic6x_breakpoint_len,
+  NULL,
+  0,
+  tic6x_breakpoint_at,
+};
diff --git a/gdb/regformats/tic6x-linux.dat b/gdb/regformats/tic6x-linux.dat
new file mode 100644
index 0000000..990846d
--- /dev/null
+++ b/gdb/regformats/tic6x-linux.dat
@@ -0,0 +1,131 @@
+# DO NOT EDIT: generated from tic6x-linux.xml
+name:tic6x_linux
+xmltarget:tic6x-linux.xml
+expedite:A15,PC
+32:A0
+32:A1
+32:A2
+32:A3
+32:A4
+32:A5
+32:A6
+32:A7
+32:A8
+32:A9
+32:A10
+32:A11
+32:A12
+32:A13
+32:A14
+32:A15
+32:B0
+32:B1
+32:B2
+32:B3
+32:B4
+32:B5
+32:B6
+32:B7
+32:B8
+32:B9
+32:B10
+32:B11
+32:B12
+32:B13
+32:B14
+32:B15
+32:None
+32:PC
+32:IRP
+32:IFR
+32:NPR
+32:A16
+32:A17
+32:A18
+32:A19
+32:A20
+32:A21
+32:A22
+32:A23
+32:A24
+32:A25
+32:A26
+32:A27
+32:A28
+32:A29
+32:A30
+32:A31
+32:B16
+32:B17
+32:B18
+32:B19
+32:B20
+32:B21
+32:B22
+32:B23
+32:B24
+32:B25
+32:B26
+32:B27
+32:B28
+32:B29
+32:B30
+32:B31
+32:AMR
+32:CSR
+32:ISR
+32:ICR
+32:IER
+32:ISTP
+32:IN
+32:OUT
+32:ACR
+32:ADR
+32:FADCR
+32:FAUCR
+32:FMCR
+32:GFPGFR
+32:DIER
+32:REP
+32:TSCL
+32:TSCH
+32:ARP
+32:ILC
+32:RILC
+32:DNUM
+32:SSR
+32:GPLYA
+32:GPLYB
+32:TSR
+32:ITSR
+32:NTSR
+32:EFR
+32:IERR
+32:DMSG
+32:CMSG
+32:DT_DMA_ADDR
+32:DT_DMA_DATA
+32:DT_DMA_CNTL
+32:TCU_CNTL
+32:RTDX_REC_CNTL
+32:RTDX_XMT_CNTL
+32:RTDX_CFG
+32:RTDX_RDATA
+32:RTDX_WDATA
+32:RTDX_RADDR
+32:RTDX_WADDR
+32:MFREG0
+32:DBG_STAT
+32:BRK_EN
+32:HWBP0_CNT
+32:HWBP0
+32:HWBP1
+32:HWBP2
+32:HWBP3
+32:OVERLAY
+32:PC_PROF
+32:ATSR
+32:TRR
+32:TCRR
+32:DESR
+32:DETR
-- 
1.7.0.4


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