Re: [try 2nd 5/8] Displaced stepping for Thumb 32-bit insns

[Yao Qi <yao at codesourcery dot com>]

On 09/14/2011 09:39 PM, Ulrich Weigand wrote:
>> >    1.  Failures in gdb.arch/thumb2-it.exp and gdb.base/gdb1555.exp. 
>> > These failures are caused by missing IT support in thumb displaced stepping.
> Ah, right.  Fortunately, I think IT support should be relatively easy to
> add, in fact we should be able to just completely emulate it:
> 
> - The first thing we do when we're about to displaced-step a Thumb insn
>   is to check the itstate and see whether we're in an IT block.
> 
> - If so, we check whether the condition is true, given the current state
>   of the flags.
> 
> - If the condition is false, we always use a NOP as the displaced
>   instruction; otherwise, compute the displaced instruction as usual.
> 
> - In either case, set the CSPR register as if we're outside of any
>   IT block while actually executing the displaced instruction.  (This
>   also makes sure that the breakpoint at the end will always be
>   executed.)
> 
> - During fixup after execution is done, re-set IT state in the CSPR
>   to the proper value (advanced by one instruction).
> 
> See also thumb_get_next_pc_raw for how to manipulate IT state ...
> 
> Does this look good to you?
> 

Yes, it looks right to me in general.  However, it doesn't handle the
case of `stepi' in condition blocks when displaced stepping is enabled,
as gdb.arch/thumb2-it.exp tested.  We expect inferior stops at the next
true-condition instruction instead of next instruction after typing
`stepi'.  In this design, inferior will stop at the next instruction
regardless of condition.  We may adjust PC value in fixup to skip these
false-condition instructions.

-- 
Yao (éå)