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Re: [RFA 1/2] mips: Switch inferior function calls to ON_STACK method.
> After some thinking I realised that the reliance on signal delivery to
> work properly to trap non-executable stack may actually be a problem for
> bare-iron targets.
IMO, I think we can start worrying about those when we actually
encounter the problem; and I am assuming that this is not going to
be specific to mips.
Are we still good to go with this patch? Attached is the latest
version. For any additional comments that you'd like to be added
(in particular, with respect to what you just pointed out), I suggest
add them as a followup patch. This way, this one is out of the way,
and we can just focus on the comments themselves.
I am also adding a second patch, which shows the changes I made
in this iteration.
Tested on mips-irix, no regression.
Thanks,
--
Joel
>From ddb25412f122ca8180238f188536b3027182cb31 Mon Sep 17 00:00:00 2001
From: Joel Brobecker <brobecker@adacore.com>
Date: Wed, 2 May 2012 20:39:57 -0400
Subject: [PATCH] mips: Switch inferior function calls to ON_STACK method.
This patch switches the mips code to use the ON_STACK method
for function calls instead of AT_SYMBOL, which we want to remove.
gdb/ChangeLog:
* mips-tdep.c (mips_push_dummy_code): New function.
(mips_gdbarch_init): Set the gdbarch call_dummy_location to
ON_STACK and install mips_push_dummy_code as our gdbarch
push_dummy_code routine.
---
gdb/mips-tdep.c | 37 +++++++++++++++++++++++++++++++++----
1 files changed, 33 insertions(+), 4 deletions(-)
diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index 9a3c7fb..68ac858 100644
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -3009,6 +3009,37 @@ mips_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
return align_down (addr, 16);
}
+/* Implement the "push_dummy_call" gdbarch method. */
+
+static CORE_ADDR
+mips_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp,
+ CORE_ADDR funaddr, struct value **args,
+ int nargs, struct type *value_type,
+ CORE_ADDR *real_pc, CORE_ADDR *bp_addr,
+ struct regcache *regcache)
+{
+ int bp_len;
+ static gdb_byte nop_insn[] = { 0, 0, 0, 0 };
+
+ *bp_addr = sp;
+ gdbarch_breakpoint_from_pc (gdbarch, bp_addr, &bp_len);
+
+ /* The breakpoint layer automatically adjusts the address of
+ breakpoints inserted in a branch delay slot. With enough
+ bad luck, the 4 bytes located just before our breakpoint
+ instruction could look like a branch instruction, and thus
+ trigger the adjustement, and break the function call entirely.
+ So, we reserve those 4 bytes and write a nop instruction
+ to prevent that from happening. */
+ write_memory (*bp_addr - bp_len, nop_insn, sizeof (nop_insn));
+ sp = mips_frame_align (gdbarch, *bp_addr - 2 * bp_len);
+
+ /* Inferior resumes at the function entry point. */
+ *real_pc = funaddr;
+
+ return sp;
+}
+
static CORE_ADDR
mips_eabi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
@@ -6906,10 +6937,8 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
/* MIPS version of CALL_DUMMY. */
- /* NOTE: cagney/2003-08-05: Eventually call dummy location will be
- replaced by a command, and all targets will default to on stack
- (regardless of the stack's execute status). */
- set_gdbarch_call_dummy_location (gdbarch, AT_SYMBOL);
+ set_gdbarch_call_dummy_location (gdbarch, ON_STACK);
+ set_gdbarch_push_dummy_code (gdbarch, mips_push_dummy_code);
set_gdbarch_frame_align (gdbarch, mips_frame_align);
set_gdbarch_convert_register_p (gdbarch, mips_convert_register_p);
--
1.7.0.4
>From 758b0c5b1dfab824516badb3f8b238b40905732f Mon Sep 17 00:00:00 2001
From: Joel Brobecker <brobecker@adacore.com>
Date: Mon, 7 May 2012 18:54:27 -0400
Subject: [PATCH] mips-tdeps ON_STACK push_dummy_call adjustements.
---
gdb/mips-tdep.c | 13 +++++--------
1 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c
index 5e9a6ed..68ac858 100644
--- a/gdb/mips-tdep.c
+++ b/gdb/mips-tdep.c
@@ -3009,7 +3009,7 @@ mips_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
return align_down (addr, 16);
}
-/* Implement the push_dummy_code gdbarch method for mips targets. */
+/* Implement the "push_dummy_call" gdbarch method. */
static CORE_ADDR
mips_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp,
@@ -3019,9 +3019,9 @@ mips_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp,
struct regcache *regcache)
{
int bp_len;
- gdb_byte null_insn[4] = { 0 };
+ static gdb_byte nop_insn[] = { 0, 0, 0, 0 };
- *bp_addr = mips_frame_align (gdbarch, sp);
+ *bp_addr = sp;
gdbarch_breakpoint_from_pc (gdbarch, bp_addr, &bp_len);
/* The breakpoint layer automatically adjusts the address of
@@ -3029,9 +3029,9 @@ mips_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp,
bad luck, the 4 bytes located just before our breakpoint
instruction could look like a branch instruction, and thus
trigger the adjustement, and break the function call entirely.
- So, we reserve those 4 bytes and write a null instruction
+ So, we reserve those 4 bytes and write a nop instruction
to prevent that from happening. */
- write_memory (*bp_addr - bp_len, null_insn, sizeof (null_insn));
+ write_memory (*bp_addr - bp_len, nop_insn, sizeof (nop_insn));
sp = mips_frame_align (gdbarch, *bp_addr - 2 * bp_len);
/* Inferior resumes at the function entry point. */
@@ -6937,9 +6937,6 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
/* MIPS version of CALL_DUMMY. */
- /* NOTE: cagney/2003-08-05: Eventually call dummy location will be
- replaced by a command, and all targets will default to on stack
- (regardless of the stack's execute status). */
set_gdbarch_call_dummy_location (gdbarch, ON_STACK);
set_gdbarch_push_dummy_code (gdbarch, mips_push_dummy_code);
set_gdbarch_frame_align (gdbarch, mips_frame_align);
--
1.7.0.4