Re: memory region attributes

[Todd Whitesel <toddpw at windriver dot com>]

> A new data structure would be introduced to describe non-overlapping
> memory regions.  Each region is defined by the start and end address,
> and a set of 'attributes' which specify requirements or restrictions
> of the memory region that GDB must respect.
> 
> Attributes I have thought of so far are memory protection (read-write,
> read-only, or write-only); memory access size (8, 16, 32, or XX bits);
> whether GDB uses software or hardware breakpoints; and whether GDB can
> cache reads (dcache).

One data point I can offer already is that certain 'jumbo' peripherals,
specifically the VMEchip2 on the motorola mv162 boards, would require a
small fleet of such memory regions because its register set is made up of
a mixture of byte and long sized registers, each of which must only be
accessed with the correct size, or you get a bus error. Fortunately such
peripherals seem to be rare.

It would also be handy to have a command that requests a very specific
bus access, letting you give the address symbolically and a size. This
way you can try 'probing' the hardware to diagnose a bus problem, without
all that tedious mucking about with memory regions.

Do we have 'volatile' information in DWARF? It would be nice to optimize
non-volatile variables however we want, but volatiles must still be accessed
using whatever size is indicated by each non-aggregate data element inside
the volatile.

-- 
Todd Whitesel
toddpw @ wrs.com