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Re: [arm] force gdb into disassembling in thumb (arm) mode
- From: Richard Earnshaw <rearnsha at arm dot com>
- To: Adrian von Bidder <avbidder at acter dot ch>
- Cc: gdb mailing list <gdb at sources dot redhat dot com>, Richard dot Earnshaw at arm dot com
- Date: Wed, 23 Jan 2002 10:44:15 +0000
- Subject: Re: [arm] force gdb into disassembling in thumb (arm) mode
- Organization: ARM Ltd.
- Reply-to: Richard dot Earnshaw at arm dot com
> The sensible way (imho) would be to interpret the (h)alfword/(w)ord
> format letters, so that x/ih and x/iw would force to interpret 16/32 bit
> instructions.
Yes, something like this would be nice.
> x/i on an odd address currently does switch to thumb mode - but it seems
> to interpret the instructions at the odd address (it doesn't strip the
> lsb when loading the data):
>
> (gdb) x/20i 0xbe1
> 0xbe1: ldrsh r5, [r6, r6]
> 0xbe3: strb r6, [r0, r5]
> 0xbe5: ldr r4, [pc, #280] (0xd00)
> 0xbe7: add sp, #280
> 0xbe9: undefined instruction 0x47b4
> 0xbeb: strh r6, [r0, #2]
Hmm, a quick test on the CVS sources shows that using an odd address will
DTRT (ie force thumb mode but then round the address down); I can't see
anything from the commit log that might have changed. The key is this
line of code:
gdb/arm-tdep.c/gdb_print_insn_arm()
memaddr = UNMAKE_THUMB_ADDR (memaddr);
Which strips off the thumb bit before actually loading the half-word.
R.