Andrew Cagney <ac131313@ges.redhat.com> writes:
>> Sorry, I'm again lost. I earlier wrote (note edits):
>> ``No, ABI. For instance mipsIII and o32. The o32 ABI thinks
>> registers have 32 bits yet the real register has 64 bits. This gives
>> two [cooked] views of the same [raw] register. When o32 debug info
>> indicates a value in two adjacent [cooked] registers, it is refering
>> to 32 bit and not 64 bit registers.''
>> I'm not discussing which of these should be printed since that is
>> outside of the scope of this discussion.
> (Sorry, the `what would this print' is a distraction.)
> Suppose I have a program compiled to the o32 ABI which has a 64-bit
> variable that the debug info says is in $a0. I'm running it on a MIPS
> III machine. This means that half of my variable is in the low 32
> bits of $a0, and the the other half is in the low 32 bits of $a1.
> So, when you say that cooked registers are "ABI registers", are you
> saying that, in the cooked register set, $a0 and $a1 would be 32-bit
> registers, even though we're executing a 64-bit instruction set?
> Having the register sizes disagree with the actual instructions being
> executed is what seems like a bad idea to me.
As I pointed out in the above, there are two cooked $a0's. One is 32
bits and one is 64 bits.
Wow. I read what you wrote, but I didn't get that. So, there are
going to be two cooked register numbers for $a0, depending on whether
one is looking at it from the ABI point of view --- like debug info
does --- or from the ISA point of view. Is that right?
An architecture is free to provide multiple views onto a single hardware
register, yes. In the case of the MIPS that technique is likely to be
useful as a clean way of mapping debug registers onto raw registers. It
isn't, however, a requirement --- the typical architecture will have a
1:1 cooked:raw mapping. BTW, did you get a chance to read through the
discussions between RichardE and myself where we when through
implementation details like this?