This is the mail archive of the gdb@sourceware.org mailing list for the GDB project.
Index Nav: | [Date Index] [Subject Index] [Author Index] [Thread Index] | |
---|---|---|
Message Nav: | [Date Prev] [Date Next] | [Thread Prev] [Thread Next] |
Other format: | [Raw text] |
On Sunday 04 April 2010 04:34:22 Mike Frysinger wrote: > in a similar vein, how can one simulate exceptions ? interrupts are easy > as those may be triggered asynchronous to the program flow (so after any > instruction is fetched/decoded/committed). exceptions though fire after > the decode step but before the commit so that no CPU state is ever > changed. in the bigger picture of things, an exception is still a normal > simulator event, so should the processor-specific sim part basically > schedule an "exception event" and then return immediately before touching > any cpu state ? or is there some common sim function i can leverage that > i simply missed ? for posterity, the answer to this half of the question is to use sim_engine_restart(), assuming of course the port is using the common sim- resume.c code (or have similar compatibility in their sim_resume() func). still out on the "how to have an insn raise an interrupt" question ... -mike
Attachment:
signature.asc
Description: This is a digitally signed message part.
Index Nav: | [Date Index] [Subject Index] [Author Index] [Thread Index] | |
---|---|---|
Message Nav: | [Date Prev] [Date Next] | [Thread Prev] [Thread Next] |