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GNU C Library master sources branch, master, updated. glibc-2.14-4-g06c07b8


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The branch, master has been updated
       via  06c07b8b9fd21854c90d22b5b23196d78837262a (commit)
       via  3d29045b5e8329d97693eda8d98f1d1e60b99c8f (commit)
      from  8c29731192565b9c917d6b97db78dcd302283df8 (commit)

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- Log -----------------------------------------------------------------
http://sources.redhat.com/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=06c07b8b9fd21854c90d22b5b23196d78837262a

commit 06c07b8b9fd21854c90d22b5b23196d78837262a
Merge: 3d29045 8c29731
Author: Ulrich Drepper <drepper@gmail.com>
Date:   Fri Jun 3 07:02:32 2011 -0400

    Merge branch 'master' of ssh://sourceware.org/git/glibc
    
    Conflicts:
    	ChangeLog

diff --cc ChangeLog
index 6a11ec6,2aca74a..64dbdc3
--- a/ChangeLog
+++ b/ChangeLog
@@@ -1,8 -1,8 +1,13 @@@
 +2011-06-02  H.J. Lu  <hongjiu.lu@intel.com>
 +
 +	* sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features):
 +	Assume Intel Core i3/i5/i7 processor if AVX is available.
 +
+ 2011-05-31  Ulrich Drepper  <drepper@gmail.com>
+ 
+ 	* sysdeps/unix/sysv/linux/dl-osinfo.h (_dl_setup_stack_chk_guard): Fix
+ 	typo.
+ 
  2011-05-31  Andreas Schwab  <schwab@redhat.com>
  
  	* nscd/nscd_getserv_r.c (nscd_getserv_r): Don't free non-malloced

http://sources.redhat.com/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=3d29045b5e8329d97693eda8d98f1d1e60b99c8f

commit 3d29045b5e8329d97693eda8d98f1d1e60b99c8f
Author: H.J. Lu <hongjiu.lu@intel.com>
Date:   Fri Jun 3 07:01:25 2011 -0400

    Assume Intel Core i3/i5/i7 processor if AVX is available

diff --git a/ChangeLog b/ChangeLog
index eee3d1b..6a11ec6 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2011-06-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features):
+	Assume Intel Core i3/i5/i7 processor if AVX is available.
+
 2011-05-31  Andreas Schwab  <schwab@redhat.com>
 
 	* nscd/nscd_getserv_r.c (nscd_getserv_r): Don't free non-malloced
diff --git a/sysdeps/x86_64/multiarch/init-arch.c b/sysdeps/x86_64/multiarch/init-arch.c
index 34ec2df..809d105 100644
--- a/sysdeps/x86_64/multiarch/init-arch.c
+++ b/sysdeps/x86_64/multiarch/init-arch.c
@@ -74,6 +74,7 @@ __init_cpu_features (void)
 	}
       else if (family == 0x06)
 	{
+	  ecx = __cpu_features.cpuid[COMMON_CPUID_INDEX_1].ecx;
 	  model += extended_model;
 	  switch (model)
 	    {
@@ -83,6 +84,12 @@ __init_cpu_features (void)
 	      __cpu_features.feature[index_Slow_BSF] |= bit_Slow_BSF;
 	      break;
 
+	    default:
+	      /* Unknown family 0x06 processors.  Assuming this is one
+	         of Core i3/i5/i7 processors if AVX is available.  */
+	      if ((ecx & bit_AVX) == 0)
+		break;
+
 	    case 0x1a:
 	    case 0x1e:
 	    case 0x1f:

-----------------------------------------------------------------------

Summary of changes:
 ChangeLog                            |    5 +++++
 sysdeps/x86_64/multiarch/init-arch.c |    7 +++++++
 2 files changed, 12 insertions(+), 0 deletions(-)


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