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Re: glibc 2.1.92 make check results under Linux PPC


On Mon, 14 Aug 2000, Geoff Keating wrote:
> > From: Andreas Jaeger <aj@suse.de>
> > Date: 14 Aug 2000 07:50:42 +0200
> >
> >  > control word is 0xd4 but should be 0x0.
> >
> > That's easy to track down - the kernel initializes the FPU to a
> > different value than glibc expects.  Check the program, check the
> > value of _FPU_DEFAULT in sysdeps/powerpc/fpu_control.h - and see what
> > the kernel does.  Either of them is at fault.
>
> It looks like it's a kernel bug.  0xd4 is non-IEEE mode with several
> exceptions enabled, you don't want that by default.  The ABI specifies
> that the FPSCR should be cleared at process startup.  Of course, glibc
> could be reading the register wrong...

It's a small bug in the glibc inline assembly. If we want to clobber a 
double-sized memory location, we have to tell it to gcc.

Franz.

	* sysdeps/powerpc/fpu_control.h: Clobber the right amount of memory.

Index: sysdeps/powerpc/fpu_control.h
===================================================================
RCS file: /cvs/glibc/libc/sysdeps/powerpc/fpu_control.h,v
retrieving revision 1.4
diff -u -p -r1.4 fpu_control.h
--- sysdeps/powerpc/fpu_control.h	1998/11/26 12:00:14	1.4
+++ sysdeps/powerpc/fpu_control.h	2000/08/16 20:42:14
@@ -51,14 +51,14 @@ typedef unsigned int fpu_control_t __att
 /* Macros for accessing the hardware control word.  */
 #define _FPU_GETCW(cw) ( { \
   fpu_control_t tmp[2] __attribute__ ((__aligned__(8))); \
-  __asm__ ("mffs 0; stfd 0,%0" : "=m" (*tmp) : : "fr0"); \
+  __asm__ ("mffs 0; stfd 0,%0" : "=m" (*(double *)tmp) : : "fr0"); \
   (cw)=tmp[1]; \
   tmp[1]; } )
 #define _FPU_SETCW(cw) { \
   fpu_control_t tmp[2] __attribute__ ((__aligned__(8))); \
   tmp[0] = 0xFFF80000; /* More-or-less arbitrary; this is a QNaN. */ \
   tmp[1] = cw; \
-  __asm__ ("lfd 0,%0; mtfsf 255,0" : : "m" (*tmp) : "fr0"); \
+  __asm__ ("lfd 0,%0; mtfsf 255,0" : : "m" (*(double *)tmp) : "fr0"); \
 }
 
 /* Default control word set at startup.  */

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