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Re: [PATCH] hp-timing for ppc32/64
- From: Steve Munroe <sjmunroe at us dot ibm dot com>
- To: Benjamin Herrenschmidt <benh at kernel dot crashing dot org>
- Cc: Kumar Gala <kumar dot gala at freescale dot com>, libc-alpha at sources dot redhat dot com
- Date: Mon, 17 Oct 2005 20:32:47 -0500
- Subject: Re: [PATCH] hp-timing for ppc32/64
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote on 10/17/2005
06:05:39 PM:
>
> > > Note that some CPUs like the 970 can have an externally clocked
> > > timebase. Apple uses this feature to make the CPU immune to bus/cpu
> > > frequency slewing, they use a 33Mhz clock for that.
> > >
> > The 970 does not implement a alternate timebase. So for 970 the
timebase
> > is the highest frequency counter available.
>
> I didn't mean an alternate timebase ... I was saying that the 970 does
> implement the main timebase, but use the option of having it clocked
> externally instead of as a divider of the bus clock (this is an option
> that can be toggled in a HID register iirc, in which cas the TB_EN pin
> becomes the timebase input).
>
This is a detail of how the kernel/firmware/motherboard sets up of the
hardware. As such it does not change the architected resources available to
application runtime.
> > It seems that Apple choose 33MHz to meet the minimum (slowest)CPU-clock
/
> > 32 timebase. But that was their choice. The IBM hardware seems to be
> > holding to the CPU_clock / 8 timebase (including 970 based JS20).
>
> No, I think the 33Mhz is due to an HW upper limit when clocking the
> timebase externally. IBM doesn't use external clocking.
>
I stand corrected.
I am sorry but I don't see how any of this is relevant to the
implementation of hp-timing.
Steven J. Munroe
Linux on Power Toolchain Architect
IBM Corporation, Linux Technology Center