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[PATCH] Add sparc optimized {l,}rint{,f} for 32-bit v9 and 64-bit.
- From: David Miller <davem at davemloft dot net>
- To: libc-alpha at sourceware dot org
- Date: Fri, 02 Mar 2012 22:01:51 -0500 (EST)
- Subject: [PATCH] Add sparc optimized {l,}rint{,f} for 32-bit v9 and 64-bit.
Committed to master.
* sysdeps/sparc/sparc32/sparcv9/fpu/s_llrint.S: New file.
* sysdeps/sparc/sparc32/sparcv9/fpu/s_llrintf.S: New file.
* sysdeps/sparc/sparc32/sparcv9/fpu/s_lrint.S: New file.
* sysdeps/sparc/sparc32/sparcv9/fpu/s_lrintf.S: New file.
* sysdeps/sparc/sparc64/fpu/s_llrint.S: New file.
* sysdeps/sparc/sparc64/fpu/s_llrintf.S: New file.
* sysdeps/sparc/sparc64/fpu/s_lrint.S: New file.
* sysdeps/sparc/sparc64/fpu/s_lrintf.S: New file.
---
ChangeLog | 11 ++++
sysdeps/sparc/sparc32/sparcv9/fpu/s_llrint.S | 67 +++++++++++++++++++++++++
sysdeps/sparc/sparc32/sparcv9/fpu/s_llrintf.S | 62 +++++++++++++++++++++++
sysdeps/sparc/sparc32/sparcv9/fpu/s_lrint.S | 67 +++++++++++++++++++++++++
sysdeps/sparc/sparc32/sparcv9/fpu/s_lrintf.S | 62 +++++++++++++++++++++++
sysdeps/sparc/sparc64/fpu/s_llrint.S | 1 +
sysdeps/sparc/sparc64/fpu/s_llrintf.S | 1 +
sysdeps/sparc/sparc64/fpu/s_lrint.S | 63 +++++++++++++++++++++++
sysdeps/sparc/sparc64/fpu/s_lrintf.S | 62 +++++++++++++++++++++++
9 files changed, 396 insertions(+), 0 deletions(-)
create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/s_llrint.S
create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/s_llrintf.S
create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/s_lrint.S
create mode 100644 sysdeps/sparc/sparc32/sparcv9/fpu/s_lrintf.S
create mode 100644 sysdeps/sparc/sparc64/fpu/s_llrint.S
create mode 100644 sysdeps/sparc/sparc64/fpu/s_llrintf.S
create mode 100644 sysdeps/sparc/sparc64/fpu/s_lrint.S
create mode 100644 sysdeps/sparc/sparc64/fpu/s_lrintf.S
diff --git a/ChangeLog b/ChangeLog
index 2ca5280..99684f6 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,14 @@
+2012-03-02 David S. Miller <davem@davemloft.net>
+
+ * sysdeps/sparc/sparc32/sparcv9/fpu/s_llrint.S: New file.
+ * sysdeps/sparc/sparc32/sparcv9/fpu/s_llrintf.S: New file.
+ * sysdeps/sparc/sparc32/sparcv9/fpu/s_lrint.S: New file.
+ * sysdeps/sparc/sparc32/sparcv9/fpu/s_lrintf.S: New file.
+ * sysdeps/sparc/sparc64/fpu/s_llrint.S: New file.
+ * sysdeps/sparc/sparc64/fpu/s_llrintf.S: New file.
+ * sysdeps/sparc/sparc64/fpu/s_lrint.S: New file.
+ * sysdeps/sparc/sparc64/fpu/s_lrintf.S: New file.
+
2012-03-02 Roland McGrath <roland@hack.frob.com>
[BZ #13792]
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/s_llrint.S b/sysdeps/sparc/sparc32/sparcv9/fpu/s_llrint.S
new file mode 100644
index 0000000..8ec9b4d
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/s_llrint.S
@@ -0,0 +1,67 @@
+/* llrint(), sparc32 v9 version.
+ Copyright (C) 2012 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by David S. Miller <davem@davemloft.net>, 2012.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+ /* We pop constants into the FPU registers using the incoming
+ argument stack slots, since this avoid having to use any PIC
+ references. We also thus avoid having to allocate a register
+ window.
+
+ VIS instructions are used to facilitate the formation of
+ easier constants, and the propagation of the sign bit. */
+
+#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
+
+#define ZERO %f10 /* 0.0 */
+#define SIGN_BIT %f12 /* -0.0 */
+
+ENTRY (__llrint)
+ sethi %hi(TWO_FIFTYTWO), %o2
+ sllx %o0, 32, %o0
+
+ or %o0, %o1, %o0
+ fzero ZERO
+
+ stx %o0, [%sp + 72]
+ sllx %o2, 32, %o2
+ fnegd ZERO, SIGN_BIT
+
+ ldd [%sp + 72], %f0
+
+ stx %o2, [%sp + 72]
+ fabsd %f0, %f14
+
+ ldd [%sp + 72], %f16
+ fcmpd %fcc3, %f14, %f16
+
+ fmovduge %fcc3, ZERO, %f16
+ fand %f0, SIGN_BIT, SIGN_BIT
+
+ for %f16, SIGN_BIT, %f16
+ faddd %f0, %f16, %f6
+ fsubd %f6, %f16, %f0
+ fabsd %f0, %f0
+ for %f0, SIGN_BIT, %f0
+ fdtox %f0, %f4
+ std %f4, [%sp + 72]
+ retl
+ ldd [%sp + 72], %o0
+END (__llrint)
+weak_alias (__llrint, llrint)
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/s_llrintf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/s_llrintf.S
new file mode 100644
index 0000000..73e9d64
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/s_llrintf.S
@@ -0,0 +1,62 @@
+/* llrintf(), sparc32 v9 version.
+ Copyright (C) 2012 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by David S. Miller <davem@davemloft.net>, 2012.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+ /* We pop constants into the FPU registers using the incoming
+ argument stack slots, since this avoid having to use any PIC
+ references. We also thus avoid having to allocate a register
+ window.
+
+ VIS instructions are used to facilitate the formation of
+ easier constants, and the propagation of the sign bit. */
+
+#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
+
+#define ZERO %f10 /* 0.0 */
+#define SIGN_BIT %f12 /* -0.0 */
+
+ENTRY (__llrintf)
+ st %o0, [%sp + 68]
+ sethi %hi(TWO_TWENTYTHREE), %o2
+ fzeros ZERO
+
+ ld [%sp + 68], %f1
+ fnegs ZERO, SIGN_BIT
+
+ st %o2, [%sp + 68]
+ fabss %f1, %f14
+
+ ld [%sp + 68], %f16
+ fcmps %fcc3, %f14, %f16
+
+ fmovsuge %fcc3, ZERO, %f16
+ fands %f1, SIGN_BIT, SIGN_BIT
+
+ fors %f16, SIGN_BIT, %f16
+ fadds %f1, %f16, %f5
+ fsubs %f5, %f16, %f0
+ fabss %f0, %f0
+ fors %f0, SIGN_BIT, %f0
+ fstox %f0, %f4
+ std %f4, [%sp + 72]
+ retl
+ ldd [%sp + 72], %o0
+END (__llrintf)
+weak_alias (__llrintf, llrintf)
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/s_lrint.S b/sysdeps/sparc/sparc32/sparcv9/fpu/s_lrint.S
new file mode 100644
index 0000000..062faba
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/s_lrint.S
@@ -0,0 +1,67 @@
+/* lrint(), sparc32 v9 version.
+ Copyright (C) 2012 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by David S. Miller <davem@davemloft.net>, 2012.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+ /* We pop constants into the FPU registers using the incoming
+ argument stack slots, since this avoid having to use any PIC
+ references. We also thus avoid having to allocate a register
+ window.
+
+ VIS instructions are used to facilitate the formation of
+ easier constants, and the propagation of the sign bit. */
+
+#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
+
+#define ZERO %f10 /* 0.0 */
+#define SIGN_BIT %f12 /* -0.0 */
+
+ENTRY (__lrint)
+ sethi %hi(TWO_FIFTYTWO), %o2
+ sllx %o0, 32, %o0
+
+ or %o0, %o1, %o0
+ fzero ZERO
+
+ stx %o0, [%sp + 72]
+ sllx %o2, 32, %o2
+ fnegd ZERO, SIGN_BIT
+
+ ldd [%sp + 72], %f0
+
+ stx %o2, [%sp + 72]
+ fabsd %f0, %f14
+
+ ldd [%sp + 72], %f16
+ fcmpd %fcc3, %f14, %f16
+
+ fmovduge %fcc3, ZERO, %f16
+ fand %f0, SIGN_BIT, SIGN_BIT
+
+ for %f16, SIGN_BIT, %f16
+ faddd %f0, %f16, %f6
+ fsubd %f6, %f16, %f0
+ fabsd %f0, %f0
+ for %f0, SIGN_BIT, %f0
+ fdtoi %f0, %f3
+ st %f3, [%sp + 72]
+ retl
+ ld [%sp + 72], %o0
+END (__lrint)
+weak_alias (__lrint, lrint)
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/s_lrintf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/s_lrintf.S
new file mode 100644
index 0000000..c546e67
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/s_lrintf.S
@@ -0,0 +1,62 @@
+/* lrintf(), sparc32 v9 version.
+ Copyright (C) 2012 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by David S. Miller <davem@davemloft.net>, 2012.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+ /* We pop constants into the FPU registers using the incoming
+ argument stack slots, since this avoid having to use any PIC
+ references. We also thus avoid having to allocate a register
+ window.
+
+ VIS instructions are used to facilitate the formation of
+ easier constants, and the propagation of the sign bit. */
+
+#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
+
+#define ZERO %f10 /* 0.0 */
+#define SIGN_BIT %f12 /* -0.0 */
+
+ENTRY (__lrintf)
+ st %o0, [%sp + 68]
+ sethi %hi(TWO_TWENTYTHREE), %o2
+ fzeros ZERO
+
+ ld [%sp + 68], %f1
+ fnegs ZERO, SIGN_BIT
+
+ st %o2, [%sp + 68]
+ fabss %f1, %f14
+
+ ld [%sp + 68], %f16
+ fcmps %fcc3, %f14, %f16
+
+ fmovsuge %fcc3, ZERO, %f16
+ fands %f1, SIGN_BIT, SIGN_BIT
+
+ fors %f16, SIGN_BIT, %f16
+ fadds %f1, %f16, %f5
+ fsubs %f5, %f16, %f0
+ fabss %f0, %f0
+ fors %f0, SIGN_BIT, %f0
+ fstoi %f0, %f3
+ st %f3, [%sp + 68]
+ retl
+ ld [%sp + 68], %o0
+END (__lrintf)
+weak_alias (__lrintf, lrintf)
diff --git a/sysdeps/sparc/sparc64/fpu/s_llrint.S b/sysdeps/sparc/sparc64/fpu/s_llrint.S
new file mode 100644
index 0000000..7c8e941
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/s_llrint.S
@@ -0,0 +1 @@
+/* llrint is implemented in s_lrint.S */
diff --git a/sysdeps/sparc/sparc64/fpu/s_llrintf.S b/sysdeps/sparc/sparc64/fpu/s_llrintf.S
new file mode 100644
index 0000000..abab3b9
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/s_llrintf.S
@@ -0,0 +1 @@
+/* llrintf is implemented in s_lrint.S */
diff --git a/sysdeps/sparc/sparc64/fpu/s_lrint.S b/sysdeps/sparc/sparc64/fpu/s_lrint.S
new file mode 100644
index 0000000..6bf56e4
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/s_lrint.S
@@ -0,0 +1,63 @@
+/* lrint(), sparc64 version.
+ Copyright (C) 2012 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by David S. Miller <davem@davemloft.net>, 2012.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+ /* We pop constants into the FPU registers using the incoming
+ argument stack slots, since this avoid having to use any PIC
+ references. We also thus avoid having to allocate a register
+ window.
+
+ VIS instructions are used to facilitate the formation of
+ easier constants, and the propagation of the sign bit. */
+
+#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
+
+#define ZERO %f10 /* 0.0 */
+#define SIGN_BIT %f12 /* -0.0 */
+
+ENTRY (__lrint)
+ sethi %hi(TWO_FIFTYTWO), %o2
+ sllx %o2, 32, %o2
+ fzero ZERO
+
+ fnegd ZERO, SIGN_BIT
+ stx %o2, [%sp + STACK_BIAS + 128]
+ fabsd %f0, %f14
+
+ ldd [%sp + STACK_BIAS + 128], %f16
+ fcmpd %fcc3, %f14, %f16
+
+ fmovduge %fcc3, ZERO, %f16
+ fand %f0, SIGN_BIT, SIGN_BIT
+
+ for %f16, SIGN_BIT, %f16
+ faddd %f0, %f16, %f6
+ fsubd %f6, %f16, %f0
+ fabsd %f0, %f0
+ for %f0, SIGN_BIT, %f0
+ fdtox %f0, %f4
+ std %f4, [%sp + STACK_BIAS + 128]
+ retl
+ ldx [%sp + STACK_BIAS + 128], %o0
+END (__lrint)
+weak_alias (__lrint, lrint)
+
+strong_alias (__lrint, __llrint)
+weak_alias (__llrint, llrint)
diff --git a/sysdeps/sparc/sparc64/fpu/s_lrintf.S b/sysdeps/sparc/sparc64/fpu/s_lrintf.S
new file mode 100644
index 0000000..2f2938b
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/s_lrintf.S
@@ -0,0 +1,62 @@
+/* lrintf(), sparc64 version.
+ Copyright (C) 2012 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by David S. Miller <davem@davemloft.net>, 2012.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+ /* We pop constants into the FPU registers using the incoming
+ argument stack slots, since this avoid having to use any PIC
+ references. We also thus avoid having to allocate a register
+ window.
+
+ VIS instructions are used to facilitate the formation of
+ easier constants, and the propagation of the sign bit. */
+
+#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
+
+#define ZERO %f10 /* 0.0 */
+#define SIGN_BIT %f12 /* -0.0 */
+
+ENTRY (__lrintf)
+ sethi %hi(TWO_TWENTYTHREE), %o2
+ fzeros ZERO
+
+ fnegs ZERO, SIGN_BIT
+ st %o2, [%sp + STACK_BIAS + 128]
+ fabss %f1, %f14
+
+ ld [%sp + STACK_BIAS + 128], %f16
+ fcmps %fcc3, %f14, %f16
+
+ fmovsuge %fcc3, ZERO, %f16
+ fands %f1, SIGN_BIT, SIGN_BIT
+
+ fors %f16, SIGN_BIT, %f16
+ fadds %f1, %f16, %f5
+ fsubs %f5, %f16, %f0
+ fabss %f0, %f0
+ fors %f0, SIGN_BIT, %f0
+ fstox %f0, %f4
+ std %f4, [%sp + STACK_BIAS + 128]
+ retl
+ ldx [%sp + STACK_BIAS + 128], %o0
+END (__lrintf)
+weak_alias (__lrintf, lrintf)
+
+strong_alias (__lrintf, __llrintf)
+weak_alias (__llrintf, llrintf)
--
1.7.6.401.g6a319