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Re: [PATCH] Fix lazy setting for PLTREL overlap cpus.


From: David Miller <davem@davemloft.net>
Date: Wed, 04 Apr 2012 03:38:51 -0400 (EDT)

> I'll do some research into the binutils code that lays things
> out like this and get back to cleaning up these macros.

Ok, by default the BFD elf linking code creates the overlap,
with PLTREL exactly at the end of REL(A).

Only specific platform _override_ this behavior (in their
finish_dynamic_sections operation) to separate PLTREL from REL(A).

So you have to do something explicitly in the BFD backend to avoid the
overlap.

The cpus which elide this overlap are:

1) i386, apparently to avoid some issue on UnixWARE, hilarious

2) x86-64 does it too, the comment there makes some vague mentions
   about how one shouldn't overlap the other.  I think this was
   simply the i386 logic copied over, viva la UnixWARE

3) MIPS, again with another vague comment stating that the RELASZ
   should not include the JMPSLOT entries.

4) IA64, this time the comment claims that eliding the overlap "makes
   things easier on ld.so"

5) M10300, simply copied the UnixWARE comment over too.  I don't
   think UnixWARE ever ran on M10300 cpus...

6) SH32/SH64, same UnixWARE comment.  People are just doing this
   without even thinking about it at all obviously.  Just turn your
   brain off and copy the i386 code over, comments and all.

7) M32R, UnixWare comment, etc.

8) LM32, UnixWare comment

9) CR16, UnixWare comment

10) ARM, UnixWare comment

11) HPPA, more original comment

12) M68K, usual comment with UnixWARE removed

13) VAX, probably copied from M68K or similar as comment is identical

14) PPC64 unconditionally, PPC32 only when VXWORKS

What's even more amusing about this situation is that the way this is
handled means that even if the BFD backend elides the overlap by
adjusting the REL(A) size down by the value of PLTRELSZ they will be
contiguous.

I'll work on tidying the dynamic-link.h macros up and getting rid of
the unnecessary bits.


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