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Re: [PATCH 2/2] PowerPC - Add a faster way to read the Time Base register


On Wed, Apr 4, 2012 at 3:41 PM, Tulio Magno Quites Machado Filho
<tuliom@linux.vnet.ibm.com> wrote:

> diff --git a/sysdeps/powerpc/sys/platform/ppc.h b/sysdeps/powerpc/sys/platform/ppc.h
> index b4bf7c8..cdfcba5 100644
> --- a/sysdeps/powerpc/sys/platform/ppc.h
> +++ b/sysdeps/powerpc/sys/platform/ppc.h
> @@ -19,5 +19,40 @@
>
> Â#define _SYS_PLATFORM_PPC_H Â Â1
>
> +typedef unsigned long long int __ppc_timebase;
> +
> +/* Read the Time Base Register
> + Â The Time Base Register is a 64-bit register that stores a monotonically
> + Â incremented value updated at a system dependent frequency that may be
> + Â different of processor frequency.
> + Â More information in Power ISA 2.06b - Book II - Section 5.2 Â */
> +#ifdef __powerpc64__
> +static inline __ppc_timebase
> +__ppc_get_timebase (void)
> +{
> + Â__ppc_timebase __tb;
> + Â__asm__ volatile (
> + Â Â Â Â Â Â Â Â Â "mfspr %0, 268\n"
> + Â Â Â Â Â Â Â Â Â : "=r" (__tb)
> + Â Â Â Â Â Â Â Â Â : );
> + Âreturn __tb;
> +}
> +#else Â/* not __powerpc64__ */
> +static inline __ppc_timebase
> +__ppc_get_timebase (void)
> +{
> + Âregister unsigned long __tbu, __tbl, __tmp; \
> + Â__asm__ volatile (
> + Â Â Â Â Â Â Â Â Â "0:\n"
> + Â Â Â Â Â Â Â Â Â "mftbu %0\n"
> + Â Â Â Â Â Â Â Â Â "mftbl %1\n"
> + Â Â Â Â Â Â Â Â Â "mftbu %2\n"
> + Â Â Â Â Â Â Â Â Â "cmpw %0, %2\n"
> + Â Â Â Â Â Â Â Â Â "bne- 0b\n"
> + Â Â Â Â Â Â Â Â Â : "=r" (__tbu), "=r" (__tbl), "=r" (__tmp)
> + Â Â Â Â Â Â Â Â Â : );
> + Âreturn (( (__ppc_timebase) __tbu << 32) | __tbl);
> +}
> +#endif Â/* not __powerpc64__ */
>
> Â#endif Â/* sys/platform/ppc.h */

Per Roland's response to [PATCH 1/2], merge this with the creation of
ppc.h, thus creating ppc.h and adding these inline functions at the
same time.

And, I think that ppc.h should be added to this patchset [PATCH 2/2]
rather than [PATCH 1/2].

Ryan


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