thread-local data access

[NIIBE Yutaka <gniibe at chroot dot org>]

Ulrich Drepper wrote:
 > The situation from my perspective is as follows:
 > 
 >  - x86:   %gs register, fast enough
 >  - SPARC: dedicated thread register
 >  - IA-64: likewise
 >  - Alpha: PAL call, fast enough (according to rth)
 > 
 > What about the other architectures?

For SH (SuperH), we could use GBR register for that.  GCC
implementation doesn't use GBR at all.

It's called "Global Base Register", say, a kind of legacy heritage. :-)
There's special addressing mode with GBR register, but the offset is
limited (we only can use 256 entries).  If I remember correctly, we
can find such addressing mode in Motorola 6809, where it was designed
to be useful for global variable access.  Provided the space needed is
small enough, it works well.  Embedded people love such feature.  But
it's too restricted for general use, GCC doesn't use GBR and its
addressing mode at all.

Once, I tried to use GBR for PIC implementation, but we have changed
to use generic register R12 instead, as we found it's not efficient
(using addressing mode with GBR requires R0 register).

The question is thread local data require large space or not.

Thanks for the discussion, 
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