Re: [PATCH ppc] memset to 0 is broken on PPC405/440/464

["Ryan S. Arnold" <ryan dot arnold at gmail dot com>]

On Fri, Sep 21, 2012 at 12:34 PM, Jason Gunthorpe
<jgunthorpe@obsidianresearch.com> wrote:
> The use_dcbz path in the hand coded assembly is assuming a 128 byte
> clear size for dcbz, but dcbz uses the cache line size and 405 cores
> only have a 32 byte cache line. So any clears to 0 that use the dcbz
> path fail to work.
>
> This seems to be because the memset.S file was designed for the 476
> CPU, which does have a 128 byte cache line size, however 405, 440, and
> 464 all use 32 bytes. (see arch/powerpc/kernel/cputable.c)
>
> This patch corrects the 405 memset.s to have the correct 32 byte cache
> size, but the 476 must continue to use the old version or it will
> clear too much. Unfortunately I'm not entirely sure how to do that (eg
> how does Implies work?)
>
> See http://sourceware.org/bugzilla/show_bug.cgi?id=14595
>
> Tested in-circuit on a 405GP CPU

Hi Jason,

Thanks for the patch.  The quick and dirty way to fix this for both
architectures is to copy the original file to
<...>/powerpc32/476/memset.S and then provide your version as you've
shown.  The result of this is that other 4** series processors
(besides 476) will end up using the 32-byte cache-line size code.

The method used to eliminate redundant code, is to do what is found in
the non-ports 'a2' version of memcpy.S
(sysdeps/powerpc/powerpc32/a2/memcpy.S).  It attempts to detect
whether the cacheline size has been set, if not (as in the case of the
code being used in the loader prior to reading the cacheline size from
the aux vector), then it uses a code path that doesn't use the
cache-block stream operations.  If it does detect the cacheline size,
it is queried, and then used for the cache-block stream operations in
an optimized path.

Ryan S. Arnold
Power Architecture maintainer

>
> --- eglibc-2_13.orig/ports/sysdeps/powerpc/powerpc32/405/memset.S       2012-09-18 23:06:38.743817536 -0600
> +++ eglibc-2_13/ports/sysdeps/powerpc/powerpc32/405/memset.S    2012-09-18 23:09:48.677194920 -0600
> @@ -105,7 +105,7 @@
>         add     r3,r3,r7
>
>  L(skip_string_loop):
> -       clrlwi  r8,r6,25
> +       clrlwi  r8,r6,27
>         srwi.   r8,r8,4
>         beq     L(dcbz_pre_loop)
>         mtctr   r8
> @@ -120,14 +120,14 @@
>         bdnz    L(word_loop)
>
>  L(dcbz_pre_loop):
> -       srwi    r6,r5,7
> +       srwi    r6,r5,5
>         mtctr   r6
>         addi    r7,0,0
>
>  L(dcbz_loop):
>         dcbz    r3,r7
> -       addi    r3,r3,0x80
> -       subi    r5,r5,0x80
> +       addi    r3,r3,32
> +       subi    r5,r5,32
>         bdnz    L(dcbz_loop)
>         srwi.   r6,r5,4
>         beq     L(postword2_count_loop)