A customer using my toolchain noticed the regs.S problem. When I
looked around further, i found that some code had hard-coded C0_COUNT
as $9, because the define wasn't available. Kinda funny, really.
Anyway, tested by verifying that mips-elf and mips64vr-elf (which now
use the C0_COUNT define) would still build.
chris
--
[ libgloss/ChangeLog ]
2004-04-02 Chris Demetriou <cgd@broadcom.com>
* mips/regs.S (C0_COUNT): Fix comment that kept this from being
defined.
* mips/vr4300.S: Use C0_COUNT as appropriate instead of hardcoding $9.
* mips/vr5xxx.S: Likewise.
Index: mips/regs.S
===================================================================
RCS file: /cvs/src/src/libgloss/mips/regs.S,v
retrieving revision 1.2
diff -u -p -r1.2 regs.S
--- mips/regs.S 18 Oct 2001 02:24:30 -0000 1.2
+++ mips/regs.S 3 Apr 2004 00:38:36 -0000
@@ -66,7 +66,7 @@
#define PHYS_TO_K1(a) ((unsigned)(a) | K1BASE)
-/* Standard Co-Processor 0 register numbers:
+/* Standard Co-Processor 0 registers */
#define C0_COUNT $9 /* Count Register */
#define C0_SR $12 /* Status Register */
#define C0_CAUSE $13 /* last exception description */
Index: mips/vr4300.S
===================================================================
RCS file: /cvs/src/src/libgloss/mips/vr4300.S,v
retrieving revision 1.1
diff -u -p -r1.1 vr4300.S
--- mips/vr4300.S 17 Mar 2000 22:48:51 -0000 1.1
+++ mips/vr4300.S 3 Apr 2004 00:38:36 -0000
@@ -47,7 +47,7 @@ __cpu_timer_poll:
j ra
nop # {DELAY SLOT}
1:
- mfc0 v0, $9 # C0_COUNT: get current counter value
+ mfc0 v0, C0_COUNT # get current counter value
nop
nop
# We cannot just do the simple test, of adding our delta onto
@@ -66,7 +66,7 @@ __cpu_timer_poll:
# sign-extended to fill the 64bit register value).
2:
# get current counter value:
- mfc0 v0, $9 # C0_COUNT
+ mfc0 v0, C0_COUNT
nop
nop
# This is an unsigned 32bit subtraction:
Index: mips/vr5xxx.S
===================================================================
RCS file: /cvs/src/src/libgloss/mips/vr5xxx.S,v
retrieving revision 1.1
diff -u -p -r1.1 vr5xxx.S
--- mips/vr5xxx.S 17 Mar 2000 22:48:51 -0000 1.1
+++ mips/vr5xxx.S 3 Apr 2004 00:38:36 -0000
@@ -64,7 +64,7 @@ __cpu_timer_poll:
j ra
nop # {DELAY SLOT}
1:
- mfc0 v0, $9 # C0_COUNT: get current counter value
+ mfc0 v0, C0_COUNT # get current counter value
nop
nop
# We cannot just do the simple test, of adding our delta onto
@@ -83,7 +83,7 @@ __cpu_timer_poll:
# sign-extended to fill the 64bit register value).
2:
# get current counter value:
- mfc0 v0, $9 # C0_COUNT
+ mfc0 v0, C0_COUNT
nop
nop
# This is an unsigned 32bit subtraction: