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Re: [patch] SPU timer


Ken Werner wrote:
Hi,

SPU code that enables interrupts must place its interrupt handler at fixed address 0x0. This patch virtualizes interrupt handling and adds clock/timer services using the decrement register. Any comments or ok to apply?

(snip)


Index: src/newlib/libc/machine/spu/spu_timer_internal.h
===================================================================
--- /dev/null
+++ src/newlib/libc/machine/spu/spu_timer_internal.h

(snip)


+/* Timers within 1 microsecond (14.3 tics) will expire together.  */
+#define TIMER_INTERVAL_WINDOW  15

The time base frequency depends on platform. E.g., 14.318MHz on Cell blades, while 79.8MHz on PS3. Does it work correctly for all Cell targets?


--
(ASAYAMA Kazunori
  (asayama@sm.sony.co.jp))
t


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